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Commit 535275d3 authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter
Browse files

drm/i915: Squelch reset messages during selftests 



During our selftests, we try reseting the GPU tens of thousands of
times, flooding the dmesg with our reset spam drowning out any potential
warnings. Add an option to i915_reset()/i915_reset_engine() to specify a
quiet reset for selftesting.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20170721123238.16428-19-chris@chris-wilson.co.uk


Reviewed-by: default avatarMichel Thierry <michel.thierry@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 3744d49c

drivers/gpu/drm/i915/i915_drv.c

+26 −22
Original line number Diff line number Diff line
@@ -1831,7 +1831,8 @@ static int i915_resume_switcheroo(struct drm_device *dev) 


/**

 * i915_reset - reset chip after a hang

 * @dev_priv: device private to reset

 * @i915: #drm_i915_private to reset

 * @flags: Instructions

 *

 * Reset the chip.  Useful if a hang is detected. Marks the device as wedged

 * on failure.
@@ -1846,34 +1847,34 @@ static int i915_resume_switcheroo(struct drm_device *dev) 
 *   - re-init interrupt state

 *   - re-init display

 */

void i915_reset(struct drm_i915_private *dev_priv)

void i915_reset(struct drm_i915_private *i915, unsigned int flags)

{

	struct i915_gpu_error *error = &dev_priv->gpu_error;

	struct i915_gpu_error *error = &i915->gpu_error;

	int ret;



	lockdep_assert_held(&dev_priv->drm.struct_mutex);

	lockdep_assert_held(&i915->drm.struct_mutex);

	GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, &error->flags));



	if (!test_bit(I915_RESET_HANDOFF, &error->flags))

		return;



	/* Clear any previous failed attempts at recovery. Time to try again. */

	if (!i915_gem_unset_wedged(dev_priv))

	if (!i915_gem_unset_wedged(i915))

		goto wakeup;



	dev_notice(dev_priv->drm.dev,

		   "Resetting chip after gpu hang\n");

	if (!(flags & I915_RESET_QUIET))

		dev_notice(i915->drm.dev, "Resetting chip after gpu hang\n");

	error->reset_count++;



	disable_irq(dev_priv->drm.irq);

	ret = i915_gem_reset_prepare(dev_priv);

	disable_irq(i915->drm.irq);

	ret = i915_gem_reset_prepare(i915);

	if (ret) {

		DRM_ERROR("GPU recovery failed\n");

		intel_gpu_reset(dev_priv, ALL_ENGINES);

		intel_gpu_reset(i915, ALL_ENGINES);

		goto error;

	}



	ret = intel_gpu_reset(dev_priv, ALL_ENGINES);

	ret = intel_gpu_reset(i915, ALL_ENGINES);

	if (ret) {

		if (ret != -ENODEV)

			DRM_ERROR("Failed to reset chip: %i\n", ret);
@@ -1882,8 +1883,8 @@ void i915_reset(struct drm_i915_private *dev_priv) 
		goto error;

	}



	i915_gem_reset(dev_priv);

	intel_overlay_reset(dev_priv);

	i915_gem_reset(i915);

	intel_overlay_reset(i915);



	/* Ok, now get things going again... */
@@ -1899,17 +1900,17 @@ void i915_reset(struct drm_i915_private *dev_priv) 
	 * was running at the time of the reset (i.e. we weren't VT

	 * switched away).

	 */

	ret = i915_gem_init_hw(dev_priv);

	ret = i915_gem_init_hw(i915);

	if (ret) {

		DRM_ERROR("Failed hw init on reset %d\n", ret);

		goto error;

	}



	i915_queue_hangcheck(dev_priv);

	i915_queue_hangcheck(i915);



finish:

	i915_gem_reset_finish(dev_priv);

	enable_irq(dev_priv->drm.irq);

	i915_gem_reset_finish(i915);

	enable_irq(i915->drm.irq);



wakeup:

	clear_bit(I915_RESET_HANDOFF, &error->flags);
@@ -1917,14 +1918,15 @@ void i915_reset(struct drm_i915_private *dev_priv) 
	return;



error:

	i915_gem_set_wedged(dev_priv);

	i915_gem_retire_requests(dev_priv);

	i915_gem_set_wedged(i915);

	i915_gem_retire_requests(i915);

	goto finish;

}



/**

 * i915_reset_engine - reset GPU engine to recover from a hang

 * @engine: engine to reset

 * @flags: options

 *

 * Reset a specific GPU engine. Useful if a hang is detected.

 * Returns zero on successful reset or otherwise an error code.
@@ -1934,7 +1936,7 @@ void i915_reset(struct drm_i915_private *dev_priv) 
 *  - reset engine (which will force the engine to idle)

 *  - re-init/configure engine

 */

int i915_reset_engine(struct intel_engine_cs *engine)

int i915_reset_engine(struct intel_engine_cs *engine, unsigned int flags)

{

	struct i915_gpu_error *error = &engine->i915->gpu_error;

	struct drm_i915_gem_request *active_request;
@@ -1942,8 +1944,10 @@ int i915_reset_engine(struct intel_engine_cs *engine) 


	GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &error->flags));



	if (!(flags & I915_RESET_QUIET)) {

		dev_notice(engine->i915->drm.dev,

			   "Resetting %s after gpu hang\n", engine->name);

	}

	error->reset_engine_count[engine->id]++;



	active_request = i915_gem_reset_prepare_engine(engine);

drivers/gpu/drm/i915/i915_drv.h

+6 −2
Original line number Diff line number Diff line
@@ -3110,8 +3110,12 @@ extern int i915_driver_load(struct pci_dev *pdev, 
extern void i915_driver_unload(struct drm_device *dev);

extern int intel_gpu_reset(struct drm_i915_private *dev_priv, u32 engine_mask);

extern bool intel_has_gpu_reset(struct drm_i915_private *dev_priv);

extern void i915_reset(struct drm_i915_private *dev_priv);

extern int i915_reset_engine(struct intel_engine_cs *engine);



#define I915_RESET_QUIET BIT(0)

extern void i915_reset(struct drm_i915_private *i915, unsigned int flags);

extern int i915_reset_engine(struct intel_engine_cs *engine,

			     unsigned int flags);



extern bool intel_has_reset_engine(struct drm_i915_private *dev_priv);

extern int intel_guc_reset(struct drm_i915_private *dev_priv);

extern void intel_engine_init_hangcheck(struct intel_engine_cs *engine);

drivers/gpu/drm/i915/i915_gem_request.c

+1 −1
Original line number Diff line number Diff line
@@ -1071,7 +1071,7 @@ static bool __i915_wait_request_check_and_reset(struct drm_i915_gem_request *req 
		return false;



	__set_current_state(TASK_RUNNING);

	i915_reset(request->i915);

	i915_reset(request->i915, 0);

	return true;

}

drivers/gpu/drm/i915/i915_irq.c

+2 −2
Original line number Diff line number Diff line
@@ -2624,7 +2624,7 @@ static void i915_reset_device(struct drm_i915_private *dev_priv) 
		 */

		do {

			if (mutex_trylock(&dev_priv->drm.struct_mutex)) {

				i915_reset(dev_priv);

				i915_reset(dev_priv, 0);

				mutex_unlock(&dev_priv->drm.struct_mutex);

			}

		} while (wait_on_bit_timeout(&dev_priv->gpu_error.flags,
@@ -2739,7 +2739,7 @@ void i915_handle_error(struct drm_i915_private *dev_priv, 
					     &dev_priv->gpu_error.flags))

				continue;



			if (i915_reset_engine(engine) == 0)

			if (i915_reset_engine(engine, 0) == 0)

				engine_mask &= ~intel_engine_flag(engine);



			clear_bit(I915_RESET_ENGINE + engine->id,

drivers/gpu/drm/i915/selftests/intel_hangcheck.c

+4 −4
Original line number Diff line number Diff line
@@ -342,7 +342,7 @@ static int igt_global_reset(void *arg) 
	mutex_lock(&i915->drm.struct_mutex);

	reset_count = i915_reset_count(&i915->gpu_error);



	i915_reset(i915);

	i915_reset(i915, I915_RESET_QUIET);



	if (i915_reset_count(&i915->gpu_error) == reset_count) {

		pr_err("No GPU reset recorded!\n");
@@ -378,7 +378,7 @@ static int igt_reset_engine(void *arg) 
		reset_engine_count = i915_reset_engine_count(&i915->gpu_error,

							     engine);



		err = i915_reset_engine(engine);

		err = i915_reset_engine(engine, I915_RESET_QUIET);

		if (err) {

			pr_err("i915_reset_engine failed\n");

			break;
@@ -511,7 +511,7 @@ static int igt_reset_active_engines(void *arg) 


		set_bit(I915_RESET_ENGINE + engine->id, &i915->gpu_error.flags);

		do {

			err = i915_reset_engine(engine);

			err = i915_reset_engine(engine, I915_RESET_QUIET);

			if (err) {

				pr_err("i915_reset_engine(%s) failed, err=%d\n",

				       engine->name, err);
@@ -715,7 +715,7 @@ static int igt_reset_queue(void *arg) 


			reset_count = fake_hangcheck(prev);



			i915_reset(i915);

			i915_reset(i915, I915_RESET_QUIET);



			GEM_BUG_ON(test_bit(I915_RESET_HANDOFF,

					    &i915->gpu_error.flags));