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Commit 53493dcf authored by Prarit Bhargava's avatar Prarit Bhargava Committed by Tony Luck
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[IA64] Cleanup of arch/ia64/sn and include/asm-ia64/sn



Replace uintX_t declarations with uX declarations.
Replace intX_t declarations with sX declarations.

Signed-off-by: default avatarPrarit Bhargava <prarit@sgi.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent f15ac580
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+5 −5
Original line number Diff line number Diff line
@@ -40,8 +40,8 @@ struct sn_flush_device_common {
	unsigned long sfdl_force_int_addr;
	unsigned long sfdl_flush_value;
	volatile unsigned long *sfdl_flush_addr;
	uint32_t sfdl_persistent_busnum;
	uint32_t sfdl_persistent_segment;
	u32 sfdl_persistent_busnum;
	u32 sfdl_persistent_segment;
	struct pcibus_info *sfdl_pcibus_info;
};

@@ -56,7 +56,7 @@ struct sn_flush_device_kernel {
 */
struct sn_flush_nasid_entry  {
	struct sn_flush_device_kernel **widget_p; // Used as an array of wid_num
	uint64_t iio_itte[8];
	u64 iio_itte[8];
};

struct hubdev_info {
@@ -70,8 +70,8 @@ struct hubdev_info {

	void				*hdi_nodepda;
	void				*hdi_node_vertex;
	uint32_t			max_segment_number;
	uint32_t			max_pcibus_number;
	u32				max_segment_number;
	u32				max_pcibus_number;
};

extern void hubdev_init_node(nodepda_t *, cnodeid_t);
+108 −98
Original line number Diff line number Diff line
@@ -3,7 +3,8 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1992-1997,2000-2004 Silicon Graphics, Inc. All Rights Reserved.
 * Copyright (C) 1992-1997,2000-2006 Silicon Graphics, Inc. All Rights
 * Reserved.
 */
#ifndef _ASM_IA64_SN_XTALK_XBOW_H
#define _ASM_IA64_SN_XTALK_XBOW_H
@@ -26,22 +27,22 @@ typedef volatile struct xb_linkregs_s {
 * gets twiddled (i.e. references to 0x4 actually go to 0x0 and vv.)
 * That's why we put the register first and filler second.
 */
    uint32_t               link_ibf;
    uint32_t               filler0;	/* filler for proper alignment */
    uint32_t               link_control;
    uint32_t               filler1;
    uint32_t               link_status;
    uint32_t               filler2;
    uint32_t               link_arb_upper;
    uint32_t               filler3;
    uint32_t               link_arb_lower;
    uint32_t               filler4;
    uint32_t               link_status_clr;
    uint32_t               filler5;
    uint32_t               link_reset;
    uint32_t               filler6;
    uint32_t               link_aux_status;
    uint32_t               filler7;
	u32 link_ibf;
	u32 filler0;	/* filler for proper alignment */
	u32 link_control;
	u32 filler1;
	u32 link_status;
	u32 filler2;
	u32 link_arb_upper;
	u32 filler3;
	u32 link_arb_lower;
	u32 filler4;
	u32 link_status_clr;
	u32 filler5;
	u32 link_reset;
	u32 filler6;
	u32 link_aux_status;
	u32 filler7;
} xb_linkregs_t;

typedef volatile struct xbow_s {
@@ -68,47 +69,47 @@ typedef volatile struct xbow_s {
 * That's why we put the register first and filler second.
 */
	/* xbow-specific widget configuration    0x000058-0x0000FF */
    uint32_t               xb_wid_arb_reload;  /* 0x00005C */
    uint32_t               _pad_000058;
    uint32_t               xb_perf_ctr_a;      /* 0x000064 */
    uint32_t               _pad_000060;
    uint32_t               xb_perf_ctr_b;      /* 0x00006c */
    uint32_t               _pad_000068;
    uint32_t               xb_nic;     /* 0x000074 */
    uint32_t               _pad_000070;
	u32 xb_wid_arb_reload; /* 0x00005C */
	u32 _pad_000058;
	u32 xb_perf_ctr_a;	/* 0x000064 */
	u32 _pad_000060;
	u32 xb_perf_ctr_b;	/* 0x00006c */
	u32 _pad_000068;
	u32 xb_nic;		/* 0x000074 */
	u32 _pad_000070;

	/* Xbridge only */
    uint32_t               xb_w0_rst_fnc;      /* 0x00007C */
    uint32_t               _pad_000078;
    uint32_t               xb_l8_rst_fnc;      /* 0x000084 */
    uint32_t               _pad_000080;
    uint32_t               xb_l9_rst_fnc;      /* 0x00008c */
    uint32_t               _pad_000088;
    uint32_t               xb_la_rst_fnc;      /* 0x000094 */
    uint32_t               _pad_000090;
    uint32_t               xb_lb_rst_fnc;      /* 0x00009c */
    uint32_t               _pad_000098;
    uint32_t               xb_lc_rst_fnc;      /* 0x0000a4 */
    uint32_t               _pad_0000a0;
    uint32_t               xb_ld_rst_fnc;      /* 0x0000ac */
    uint32_t               _pad_0000a8;
    uint32_t               xb_le_rst_fnc;      /* 0x0000b4 */
    uint32_t               _pad_0000b0;
    uint32_t               xb_lf_rst_fnc;      /* 0x0000bc */
    uint32_t               _pad_0000b8;
    uint32_t               xb_lock;            /* 0x0000c4 */
    uint32_t               _pad_0000c0;
    uint32_t               xb_lock_clr;        /* 0x0000cc */
    uint32_t               _pad_0000c8;
	u32 xb_w0_rst_fnc;	/* 0x00007C */
	u32 _pad_000078;
	u32 xb_l8_rst_fnc;	/* 0x000084 */
	u32 _pad_000080;
	u32 xb_l9_rst_fnc;	/* 0x00008c */
	u32 _pad_000088;
	u32 xb_la_rst_fnc;	/* 0x000094 */
	u32 _pad_000090;
	u32 xb_lb_rst_fnc;	/* 0x00009c */
	u32 _pad_000098;
	u32 xb_lc_rst_fnc;	/* 0x0000a4 */
	u32 _pad_0000a0;
	u32 xb_ld_rst_fnc;	/* 0x0000ac */
	u32 _pad_0000a8;
	u32 xb_le_rst_fnc;	/* 0x0000b4 */
	u32 _pad_0000b0;
	u32 xb_lf_rst_fnc;	/* 0x0000bc */
	u32 _pad_0000b8;
	u32 xb_lock;		/* 0x0000c4 */
	u32 _pad_0000c0;
	u32 xb_lock_clr;	/* 0x0000cc */
	u32 _pad_0000c8;
	/* end of Xbridge only */
    uint32_t               _pad_0000d0[12];
	u32 _pad_0000d0[12];

	/* Link Specific Registers, port 8..15   0x000100-0x000300 */
	xb_linkregs_t xb_link_raw[MAX_XBOW_PORTS];
#define xb_link(p)      xb_link_raw[(p) & (MAX_XBOW_PORTS - 1)]

} xbow_t;

#define xb_link(p) xb_link_raw[(p) & (MAX_XBOW_PORTS - 1)]

#define XB_FLAGS_EXISTS		0x1	/* device exists */
#define XB_FLAGS_MASTER		0x2
#define XB_FLAGS_SLAVE		0x0
@@ -181,13 +182,20 @@ typedef volatile struct xbow_s {
#define	XB_CTRL_LINKALIVE_IE		0x80000000	/* link comes alive */
/* reserved:			0x40000000 */
#define	XB_CTRL_PERF_CTR_MODE_MSK	0x30000000	/* perf counter mode */
#define	XB_CTRL_IBUF_LEVEL_MSK		0x0e000000	/* input packet buffer level */
#define	XB_CTRL_8BIT_MODE		0x01000000	/* force link into 8 bit mode */
#define XB_CTRL_BAD_LLP_PKT		0x00800000	/* force bad LLP packet */
#define XB_CTRL_WIDGET_CR_MSK		0x007c0000	/* LLP widget credit mask */
#define XB_CTRL_WIDGET_CR_SHFT	18			/* LLP widget credit shift */
#define XB_CTRL_ILLEGAL_DST_IE		0x00020000	/* illegal destination */
#define XB_CTRL_OALLOC_IBUF_IE		0x00010000	/* overallocated input buffer */
#define	XB_CTRL_IBUF_LEVEL_MSK		0x0e000000	/* input packet buffer
							   level */
#define	XB_CTRL_8BIT_MODE		0x01000000	/* force link into 8
							   bit mode */
#define XB_CTRL_BAD_LLP_PKT		0x00800000	/* force bad LLP
							   packet */
#define XB_CTRL_WIDGET_CR_MSK		0x007c0000	/* LLP widget credit
							   mask */
#define XB_CTRL_WIDGET_CR_SHFT	18			/* LLP widget credit
							   shift */
#define XB_CTRL_ILLEGAL_DST_IE		0x00020000	/* illegal destination
							 */
#define XB_CTRL_OALLOC_IBUF_IE		0x00010000	/* overallocated input
							   buffer */
/* reserved:			0x0000fe00 */
#define XB_CTRL_BNDWDTH_ALLOC_IE	0x00000100	/* bandwidth alloc */
#define XB_CTRL_RCV_CNT_OFLOW_IE	0x00000080	/* rcv retry overflow */
@@ -196,7 +204,8 @@ typedef volatile struct xbow_s {
#define XB_CTRL_RCV_IE			0x00000010	/* receive */
#define XB_CTRL_XMT_RTRY_IE		0x00000008	/* transmit retry */
/* reserved:			0x00000004 */
#define	XB_CTRL_MAXREQ_TOUT_IE		0x00000002	/* maximum request timeout */
#define	XB_CTRL_MAXREQ_TOUT_IE		0x00000002	/* maximum request
							   timeout */
#define	XB_CTRL_SRC_TOUT_IE		0x00000001	/* source timeout */

/* link_status(x) */
@@ -238,7 +247,8 @@ typedef volatile struct xbow_s {
/* XBOW_WID_STAT */
#define	XB_WID_STAT_LINK_INTR_SHFT	(24)
#define	XB_WID_STAT_LINK_INTR_MASK	(0xFF << XB_WID_STAT_LINK_INTR_SHFT)
#define	XB_WID_STAT_LINK_INTR(x)	(0x1 << (((x)&7) + XB_WID_STAT_LINK_INTR_SHFT))
#define	XB_WID_STAT_LINK_INTR(x) \
	(0x1 << (((x)&7) + XB_WID_STAT_LINK_INTR_SHFT))
#define	XB_WID_STAT_WIDGET0_INTR	0x00800000
#define XB_WID_STAT_SRCID_MASK		0x000003c0	/* Xbridge only */
#define	XB_WID_STAT_REG_ACC_ERR		0x00000020
+23 −23
Original line number Diff line number Diff line
@@ -25,28 +25,28 @@

/* widget configuration registers */
struct widget_cfg{
	uint32_t	w_id;	/* 0x04 */
	uint32_t	w_pad_0;	/* 0x00 */
	uint32_t	w_status;	/* 0x0c */
	uint32_t	w_pad_1;	/* 0x08 */
	uint32_t	w_err_upper_addr;	/* 0x14 */
	uint32_t	w_pad_2;	/* 0x10 */
	uint32_t	w_err_lower_addr;	/* 0x1c */
	uint32_t	w_pad_3;	/* 0x18 */
	uint32_t	w_control;	/* 0x24 */
	uint32_t	w_pad_4;	/* 0x20 */
	uint32_t	w_req_timeout;	/* 0x2c */
	uint32_t	w_pad_5;	/* 0x28 */
	uint32_t	w_intdest_upper_addr;	/* 0x34 */
	uint32_t	w_pad_6;	/* 0x30 */
	uint32_t	w_intdest_lower_addr;	/* 0x3c */
	uint32_t	w_pad_7;	/* 0x38 */
	uint32_t	w_err_cmd_word;	/* 0x44 */
	uint32_t	w_pad_8;	/* 0x40 */
	uint32_t	w_llp_cfg;	/* 0x4c */
	uint32_t	w_pad_9;	/* 0x48 */
	uint32_t	w_tflush;	/* 0x54 */
	uint32_t	w_pad_10;	/* 0x50 */
	u32	w_id;	/* 0x04 */
	u32	w_pad_0;	/* 0x00 */
	u32	w_status;	/* 0x0c */
	u32	w_pad_1;	/* 0x08 */
	u32	w_err_upper_addr;	/* 0x14 */
	u32	w_pad_2;	/* 0x10 */
	u32	w_err_lower_addr;	/* 0x1c */
	u32	w_pad_3;	/* 0x18 */
	u32	w_control;	/* 0x24 */
	u32	w_pad_4;	/* 0x20 */
	u32	w_req_timeout;	/* 0x2c */
	u32	w_pad_5;	/* 0x28 */
	u32	w_intdest_upper_addr;	/* 0x34 */
	u32	w_pad_6;	/* 0x30 */
	u32	w_intdest_lower_addr;	/* 0x3c */
	u32	w_pad_7;	/* 0x38 */
	u32	w_err_cmd_word;	/* 0x44 */
	u32	w_pad_8;	/* 0x40 */
	u32	w_llp_cfg;	/* 0x4c */
	u32	w_pad_9;	/* 0x48 */
	u32	w_tflush;	/* 0x54 */
	u32	w_pad_10;	/* 0x50 */
};

/*
@@ -63,7 +63,7 @@ struct xwidget_info{
	struct xwidget_hwid	xwi_hwid;	/* Widget Identification */
	char			xwi_masterxid;	/* Hub's Widget Port Number */
	void			*xwi_hubinfo;     /* Hub's provider private info */
	uint64_t		*xwi_hub_provider; /* prom provider functions */
	u64			*xwi_hub_provider; /* prom provider functions */
	void			*xwi_vertex;
};

+5 −5
Original line number Diff line number Diff line
@@ -268,7 +268,7 @@ static void sn_fixup_ionodes(void)
 */
static void
sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
		    int64_t * pci_addrs)
		    s64 * pci_addrs)
{
	struct pci_controller *controller = PCI_CONTROLLER(dev->bus);
	unsigned int i;
@@ -328,7 +328,7 @@ void sn_pci_fixup_slot(struct pci_dev *dev)
 	struct pci_bus *host_pci_bus;
 	struct pci_dev *host_pci_dev;
	struct pcidev_info *pcidev_info;
	int64_t pci_addrs[PCI_ROM_RESOURCE + 1];
	s64 pci_addrs[PCI_ROM_RESOURCE + 1];
 	struct sn_irq_info *sn_irq_info;
 	unsigned long size;
 	unsigned int bus_no, devfn;
+5 −5
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ extern int sn_ioif_inited;
static struct list_head **sn_irq_lh;
static spinlock_t sn_irq_info_lock = SPIN_LOCK_UNLOCKED; /* non-IRQ lock */

static inline uint64_t sn_intr_alloc(nasid_t local_nasid, int local_widget,
static inline u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
				     u64 sn_irq_info,
				     int req_irq, nasid_t req_nasid,
				     int req_slice)
@@ -123,7 +123,7 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)

	list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
				 sn_irq_lh[irq], list) {
		uint64_t bridge;
		u64 bridge;
		int local_widget, status;
		nasid_t local_nasid;
		struct sn_irq_info *new_irq_info;
@@ -134,7 +134,7 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
			break;
		memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));

		bridge = (uint64_t) new_irq_info->irq_bridge;
		bridge = (u64) new_irq_info->irq_bridge;
		if (!bridge) {
			kfree(new_irq_info);
			break; /* irq is not a device interrupt */
@@ -349,10 +349,10 @@ static void force_interrupt(int irq)
 */
static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
{
	uint64_t regval;
	u64 regval;
	int irr_reg_num;
	int irr_bit;
	uint64_t irr_reg;
	u64 irr_reg;
	struct pcidev_info *pcidev_info;
	struct pcibus_info *pcibus_info;

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