Commit 52d3d06e authored Feb 19, 2013 by Borislav Petkov Committed by H. Peter Anvin Feb 19, 2013

x86, cpu, amd: Fix WC+ workaround for older virtual hosts



The WC+ workaround for F10h introduces a new MSR and kvm host #GPs
on accesses to unknown MSRs if paravirt is not compiled in. Use the
exception-handling MSR accessors so as not to break 3.8 and later guests
booting on older hosts.

Remove a redundant family check while at it.

Cc: Gleb Natapov <gleb@redhat.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1361298793-31834-1-git-send-email-bp@alien8.de


Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>

parent f0322bd3

arch/x86/kernel/cpu/amd.c

+7 −5

Original line number	Diff line number	Diff line
		@@ -723,12 +723,14 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
		* performance degradation for certain nested-paging guests.
		* Prevent this conversion by clearing bit 24 in
		* MSR_AMD64_BU_CFG2.
		*
		* NOTE: we want to use the _safe accessors so as not to #GP kvm
		* guests on older kvm hosts.
		*/
		if (c->x86 == 0x10) {
		rdmsrl(MSR_AMD64_BU_CFG2, value);

		rdmsrl_safe(MSR_AMD64_BU_CFG2, &value);
		value &= ~(1ULL << 24);
		wrmsrl(MSR_AMD64_BU_CFG2, value);
		}
		wrmsrl_safe(MSR_AMD64_BU_CFG2, value);
		}

		rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);