IB/ipath: support new QLogic product naming scheme

	ipath_eeprom.o \

	ipath_file_ops.o \

	ipath_fs.o \

	ipath_ht400.o \

	ipath_iba6110.o \

	ipath_iba6120.o \

	ipath_init_chip.o \

	ipath_intr.o \

	ipath_keys.o \

	ipath_mad.o \

	ipath_mmap.o \

	ipath_mr.o \

	ipath_pe800.o \

	ipath_qp.o \

	ipath_rc.o \

	ipath_ruc.o \

	/* setup the chip-specific functions, as early as possible. */

	switch (ent->device) {

	case PCI_DEVICE_ID_INFINIPATH_HT:

		ipath_init_ht400_funcs(dd);

		ipath_init_iba6110_funcs(dd);

		break;

	case PCI_DEVICE_ID_INFINIPATH_PE800:

		ipath_init_pe800_funcs(dd);

		ipath_init_iba6120_funcs(dd);

		break;

	default:

		ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "

		 */

		if (l == hdrqtail || (i && !(i&0xf))) {

			u64 lval;

			if (l == hdrqtail) /* PE-800 interrupt only on last */

			if (l == hdrqtail)

				/* request IBA6120 interrupt only on last */

				lval = dd->ipath_rhdrhead_intr_off | l;

			else

				lval = l;

	}

	if (!dd->ipath_rhdrhead_intr_off && !reloop) {

		/* HT-400 workaround; we can have a race clearing chip

		/* IBA6110 workaround; we can have a race clearing chip

		 * interrupt with another interrupt about to be delivered,

		 * and can clear it before it is delivered on the GPIO

		 * workaround.  By doing the extra check here for the

		ret = mmap_rcvegrbufs(vma, pd);

	else if (pgaddr == (u64) pd->port_rcvhdrq_phys) {

		/*

		 * The rcvhdrq itself; readonly except on HT-400 (so have

		 * The rcvhdrq itself; readonly except on HT (so have

		 * to allow writable mapping), multiple pages, contiguous

		 * from an i/o perspective.

		 */

	 * This code is present to allow a knowledgeable person to

	 * specify the layout of processes to processors before opening

	 * this driver, and then we'll assign the process to the "closest"

	 * HT-400 to that processor (we assume reasonable connectivity,

	 * InfiniPath chip to that processor (we assume reasonable connectivity,

	 * for now).  This code assumes that if affinity has been set

	 * before this point, that at most one cpu is set; for now this

	 * is reasonable.  I check for both cpus_empty() and cpus_full(),

	 * in case some kernel variant sets none of the bits when no

	 * affinity is set.  2.6.11 and 12 kernels have all present

	 * cpus set.  Some day we'll have to fix it up further to handle

	 * a cpu subset.  This algorithm fails for two HT-400's connected

	 * a cpu subset.  This algorithm fails for two HT chips connected

	 * in tunnel fashion.  Eventually this needs real topology

	 * information.  There may be some issues with dual core numbering

	 * as well.  This needs more work prior to release.

/*

 * This file contains all of the code that is specific to the InfiniPath

 * HT-400 chip.

 * HT chip.

 */

#include <linux/pci.h>

#include "ipath_registers.h"

/*

 * This lists the InfiniPath HT400 registers, in the actual chip layout.

 * This lists the InfiniPath registers, in the actual chip layout.

 * This structure should never be directly accessed.

 *

 * The names are in InterCap form because they're taken straight from

	if (hwerrs & INFINIPATH_HWE_HTCMISCERR7)

		strlcat(msg, "[HT core Misc7]", msgl);

	if (hwerrs & INFINIPATH_HWE_MEMBISTFAILED) {

		strlcat(msg, "[Memory BIST test failed, HT-400 unusable]",

		strlcat(msg, "[Memory BIST test failed, InfiniPath hardware unusable]",

			msgl);

		/* ignore from now on, so disable until driver reloaded */

		dd->ipath_hwerrmask &= ~INFINIPATH_HWE_MEMBISTFAILED;

	if (hwerrs & _IPATH_PLL_FAIL) {

		snprintf(bitsmsg, sizeof bitsmsg,

			 "[PLL failed (%llx), HT-400 unusable]",

			 "[PLL failed (%llx), InfiniPath hardware unusable]",

			 (unsigned long long) (hwerrs & _IPATH_PLL_FAIL));

		strlcat(msg, bitsmsg, msgl);

		/* ignore from now on, so disable until driver reloaded */

		break;

	case 5:

		/*

		 * HT-460 original production board; two production levels, with

		 * original production board; two production levels, with

		 * different serial number ranges.   See ipath_ht_early_init() for

		 * case where we enable IPATH_GPIO_INTR for later serial # range.

		 */

		n = "InfiniPath_HT-460";

		n = "InfiniPath_QHT7040";

		break;

	case 6:

		n = "OEM_Board_3";

		break;

	case 7:

		/* HT-460 small form factor production board */

		n = "InfiniPath_HT-465";

		/* small form factor production board */

		n = "InfiniPath_QHT7140";

		break;

	case 8:

		n = "LS/X-1";

		n = "OEM_Board_2";

		break;

	case 11:

		n = "InfiniPath_HT-470";

		n = "InfiniPath_HT-470"; /* obsoleted */

		break;

	case 12:

		n = "OEM_Board_4";

	default:		/* don't know, just print the number */

		ipath_dev_err(dd, "Don't yet know about board "

			      "with ID %u\n", boardrev);

		snprintf(name, namelen, "Unknown_InfiniPath_HT-4xx_%u",

		snprintf(name, namelen, "Unknown_InfiniPath_QHT7xxx_%u",

			 boardrev);

		break;

	}

	if (dd->ipath_majrev != 3 || (dd->ipath_minrev < 2 || dd->ipath_minrev > 3)) {

		/*

		 * This version of the driver only supports the HT-400

		 * Rev 3.2

		 * This version of the driver only supports Rev 3.2 and 3.3

		 */

		ipath_dev_err(dd,

			      "Unsupported HT-400 revision %u.%u!\n",

			      "Unsupported InfiniPath hardware revision %u.%u!\n",

			      dd->ipath_majrev, dd->ipath_minrev);

		ret = 1;

		goto bail;

static int ipath_setup_ht_reset(struct ipath_devdata *dd)

{

	ipath_dbg("No reset possible for HT-400\n");

	ipath_dbg("No reset possible for this InfiniPath hardware\n");

	return 0;

}

	/*

	 * kernels with CONFIG_PCI_MSI set the vector in the irq field of

	 * struct pci_device, so we use that to program the HT-400 internal

	 * struct pci_device, so we use that to program the internal

	 * interrupt register (not config space) with that value. The BIOS

	 * must still have done the basic MSI setup.

	 */

 * @dd: the infinipath device

 *

 * Called during driver unload.

 * This is currently a nop for the HT-400, not for all chips

 * This is currently a nop for the HT chip, not for all chips

 */

static void ipath_setup_ht_cleanup(struct ipath_devdata *dd)

{

	dd->ipath_rcvhdrsize = IPATH_DFLT_RCVHDRSIZE;

	/*

	 * For HT-400, we allocate a somewhat overly large eager buffer,

	 * For HT, we allocate a somewhat overly large eager buffer,

	 * such that we can guarantee that we can receive the largest

	 * packet that we can send out.  To truly support a 4KB MTU,

	 * we need to bump this to a large value.  To date, other than

	if(dd->ipath_boardrev == 5 && dd->ipath_serial[0] == '1' &&

		dd->ipath_serial[1] == '2' && dd->ipath_serial[2] == '8') {

		/*

		 * Later production HT-460 has same changes as HT-465, so

		 * Later production QHT7040 has same changes as QHT7140, so

		 * can use GPIO interrupts.  They have serial #'s starting

		 * with 128, rather than 112.

		 */

}

/**

 * ipath_init_ht400_funcs - set up the chip-specific function pointers

 * ipath_init_iba6110_funcs - set up the chip-specific function pointers

 * @dd: the infinipath device

 *

 * This is global, and is called directly at init to set up the

 * chip-specific function pointers for later use.

 */

void ipath_init_ht400_funcs(struct ipath_devdata *dd)

void ipath_init_iba6110_funcs(struct ipath_devdata *dd)

{

	dd->ipath_f_intrsetup = ipath_ht_intconfig;

	dd->ipath_f_bus = ipath_setup_ht_config;

 */

/*

 * This file contains all of the code that is specific to the

 * InfiniPath PE-800 chip.

 * InfiniPath PCIe chip.

 */

#include <linux/interrupt.h>

/*

 * This file contains all the chip-specific register information and

 * access functions for the QLogic InfiniPath PE800, the PCI-Express chip.

 * access functions for the QLogic InfiniPath PCI-Express chip.

 *

 * This lists the InfiniPath PE800 registers, in the actual chip layout.

 * This lists the InfiniPath registers, in the actual chip layout.

 * This structure should never be directly accessed.

 */

struct _infinipath_do_not_use_kernel_regs {

	.kr_rcvhdraddr = IPATH_KREG_OFFSET(RcvHdrAddr0),

	.kr_rcvhdrtailaddr = IPATH_KREG_OFFSET(RcvHdrTailAddr0),

	/* This group is pe-800-specific; and used only in this file */

	/* The rcvpktled register controls one of the debug port signals, so

	 * a packet activity LED can be connected to it. */

	.kr_rcvpktledcnt = IPATH_KREG_OFFSET(RcvPktLEDCnt),

	*msg = '\0';

	if (hwerrs & INFINIPATH_HWE_MEMBISTFAILED) {

		strlcat(msg, "[Memory BIST test failed, PE-800 unusable]",

		strlcat(msg, "[Memory BIST test failed, InfiniPath hardware unusable]",

			msgl);

		/* ignore from now on, so disable until driver reloaded */

		*dd->ipath_statusp |= IPATH_STATUS_HWERROR;

	if (hwerrs & _IPATH_PLL_FAIL) {

		snprintf(bitsmsg, sizeof bitsmsg,

			 "[PLL failed (%llx), PE-800 unusable]",

			 "[PLL failed (%llx), InfiniPath hardware unusable]",

			 (unsigned long long) hwerrs & _IPATH_PLL_FAIL);

		strlcat(msg, bitsmsg, msgl);

		/* ignore from now on, so disable until driver reloaded */

		n = "InfiniPath_Emulation";

		break;

	case 1:

		n = "InfiniPath_PE-800-Bringup";

		n = "InfiniPath_QLE7140-Bringup";

		break;

	case 2:

		n = "InfiniPath_PE-880";

		n = "InfiniPath_QLE7140";

		break;

	case 3:

		n = "InfiniPath_PE-850";

		n = "InfiniPath_QMI7140";

		break;

	case 4:

		n = "InfiniPath_PE-860";

		n = "InfiniPath_QEM7140";

		break;

	case 5:

		n = "InfiniPath_QMH7140";

		break;

	default:

		ipath_dev_err(dd,

			      "Don't yet know about board with ID %u\n",

			      boardrev);

		snprintf(name, namelen, "Unknown_InfiniPath_PE-8xx_%u",

		snprintf(name, namelen, "Unknown_InfiniPath_PCIe_%u",

			 boardrev);

		break;

	}

		snprintf(name, namelen, "%s", n);

	if (dd->ipath_majrev != 4 || !dd->ipath_minrev || dd->ipath_minrev>2) {

		ipath_dev_err(dd, "Unsupported PE-800 revision %u.%u!\n",

		ipath_dev_err(dd, "Unsupported InfiniPath hardware revision %u.%u!\n",

			      dd->ipath_majrev, dd->ipath_minrev);

		ret = 1;

	} else

	ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val);

}

/* this is not yet needed on the PE800, so just return 0. */

/* this is not yet needed on this chip, so just return 0. */

static int ipath_pe_intconfig(struct ipath_devdata *dd)

{

	return 0;

 *

 * This is called during driver unload.

 * We do the pci_disable_msi here, not in generic code, because it

 * isn't used for the HT-400. If we do end up needing pci_enable_msi

 * at some point in the future for HT-400, we'll move the call back

 * isn't used for the HT chips. If we do end up needing pci_enable_msi

 * at some point in the future for HT, we'll move the call back

 * into the main init_one code.

 */

static void ipath_setup_pe_cleanup(struct ipath_devdata *dd)

 * late in 2.6.16).

 * All that can be done is to edit the kernel source to remove the quirk

 * check until that is fixed.

 * We do not need to call enable_msi() for our HyperTransport chip (HT-400),

 * even those it uses MSI, and we want to avoid the quirk warning, so

 * So we call enable_msi only for the PE-800.  If we do end up needing

 * pci_enable_msi at some point in the future for HT-400, we'll move the

 * We do not need to call enable_msi() for our HyperTransport chip,

 * even though it uses MSI, and we want to avoid the quirk warning, so

 * So we call enable_msi only for PCIe.  If we do end up needing

 * pci_enable_msi at some point in the future for HT, we'll move the

 * call back into the main init_one code.

 * We save the msi lo and hi values, so we can restore them after

 * chip reset (the kernel PCI infrastructure doesn't yet handle that

	int ret;

	/* Use ERROR so it shows up in logs, etc. */

	ipath_dev_err(dd, "Resetting PE-800 unit %u\n",

		      dd->ipath_unit);

	ipath_dev_err(dd, "Resetting InfiniPath unit %u\n", dd->ipath_unit);

	/* keep chip from being accessed in a few places */

	dd->ipath_flags &= ~(IPATH_INITTED|IPATH_PRESENT);

	val = dd->ipath_control | INFINIPATH_C_RESET;

 * @port: the port

 *

 * clear all TID entries for a port, expected and eager.

 * Used from ipath_close().  On PE800, TIDs are only 32 bits,

 * Used from ipath_close().  On this chip, TIDs are only 32 bits,

 * not 64, but they are still on 64 bit boundaries, so tidbase

 * is declared as u64 * for the pointer math, even though we write 32 bits

 */

	dd->ipath_flags |= IPATH_4BYTE_TID;

	/*

	 * For openib, we need to be able to handle an IB header of 96 bytes

	 * or 24 dwords.  HT-400 has arbitrary sized receive buffers, so we

	 * made them the same size as the PIO buffers.  The PE-800 does not

	 * For openfabrics, we need to be able to handle an IB header of

	 * 24 dwords.  HT chip has arbitrary sized receive buffers, so we

	 * made them the same size as the PIO buffers.  This chip does not

	 * handle arbitrary size buffers, so we need the header large enough

	 * to handle largest IB header, but still have room for a 2KB MTU

	 * standard IB packet.

	dd->ipath_rcvhdrentsize = 24;

	dd->ipath_rcvhdrsize = IPATH_DFLT_RCVHDRSIZE;

	/* For HT-400, we allocate a somewhat overly large eager buffer,

	 * such that we can guarantee that we can receive the largest packet

	 * that we can send out.  To truly support a 4KB MTU, we need to

	 * bump this to a larger value.  We'll do this when I get around to

	 * testing 4KB sends on the PE-800, which I have not yet done.

	/*

	 * To truly support a 4KB MTU (for usermode), we need to

	 * bump this to a larger value.  For now, we use them for

	 * the kernel only.

	 */

	dd->ipath_rcvegrbufsize = 2048;

	/*

	dd->ipath_init_ibmaxlen = dd->ipath_ibmaxlen;

	/*

	 * For PE-800, we can request a receive interrupt for 1 or

	 * We can request a receive interrupt for 1 or

	 * more packets from current offset.  For now, we set this

	 * up for a single packet, to match the HT-400 behavior.

	 * up for a single packet.

	 */

	dd->ipath_rhdrhead_intr_off = 1ULL<<32;

}

/**

 * ipath_init_pe800_funcs - set up the chip-specific function pointers

 * ipath_init_iba6120_funcs - set up the chip-specific function pointers

 * @dd: the infinipath device

 *

 * This is global, and is called directly at init to set up the

 * chip-specific function pointers for later use.

 */

void ipath_init_pe800_funcs(struct ipath_devdata *dd)

void ipath_init_iba6120_funcs(struct ipath_devdata *dd)

{

	dd->ipath_f_intrsetup = ipath_pe_intconfig;

	dd->ipath_f_bus = ipath_setup_pe_config;