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Commit 50020fb6 authored by Joerg Roedel's avatar Joerg Roedel
Browse files

x86/amd-iommu: Introduce increase_address_space function 



This function will be used to increase the address space
size of a protection domain.

Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
parent 04bfdd84

arch/x86/include/asm/amd_iommu_types.h

+4 −0
Original line number Diff line number Diff line
@@ -160,6 +160,10 @@ 
				  ((1ULL << PM_LEVEL_SHIFT((x))) - 1): \

				   (0xffffffffffffffffULL))

#define PM_LEVEL_INDEX(x, a)	(((a) >> PM_LEVEL_SHIFT((x))) & 0x1ffULL)

#define PM_LEVEL_ENC(x)		(((x) << 9) & 0xe00ULL)

#define PM_LEVEL_PDE(x, a)	((a) | PM_LEVEL_ENC((x)) | \

				 IOMMU_PTE_P | IOMMU_PTE_IR | IOMMU_PTE_IW)





#define IOMMU_PTE_L2_INDEX(address) (((address) >> 30) & 0x1ffULL)

#define IOMMU_PTE_L1_INDEX(address) (((address) >> 21) & 0x1ffULL)

arch/x86/kernel/amd_iommu.c

+27 −0
Original line number Diff line number Diff line
@@ -1324,6 +1324,33 @@ static void update_domain(struct protection_domain *domain) 
	domain->updated = false;

}



/*

 * This function is used to add another level to an IO page table. Adding

 * another level increases the size of the address space by 9 bits to a size up

 * to 64 bits.

 */

static bool increase_address_space(struct protection_domain *domain,

				   gfp_t gfp)

{

	u64 *pte;



	if (domain->mode == PAGE_MODE_6_LEVEL)

		/* address space already 64 bit large */

		return false;



	pte = (void *)get_zeroed_page(gfp);

	if (!pte)

		return false;



	*pte             = PM_LEVEL_PDE(domain->mode,

					virt_to_phys(domain->pt_root));

	domain->pt_root  = pte;

	domain->mode    += 1;

	domain->updated  = true;



	return true;

}



/*

 * If the pte_page is not yet allocated this function is called

 */