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Commit 4f29b73b authored by Yazen Ghannam's avatar Yazen Ghannam Committed by Thomas Gleixner
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x86/mce/AMD: Extract the error address on SMCA systems 



The MCA_ADDR registers on Scalable MCA systems contain the ErrorAddr
in bits [55:0] and the least significant bit of the address in bits
[61:56]. We should extract the valid ErrorAddr bits from the MCA_ADDR
register rather than saving the raw value to struct mce.

Signed-off-by: default avatarYazen Ghannam <Yazen.Ghannam@amd.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1473275643-1721-1-git-send-email-Yazen.Ghannam@amd.com


Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 4b711f92

arch/x86/kernel/cpu/mcheck/mce.c

+10 −0
Original line number Diff line number Diff line
@@ -588,6 +588,16 @@ static void mce_read_aux(struct mce *m, int i) 
			m->addr >>= shift;

			m->addr <<= shift;

		}



		/*

		 * Extract [55:<lsb>] where lsb is the least significant

		 * *valid* bit of the address bits.

		 */

		if (mce_flags.smca) {

			u8 lsb = (m->addr >> 56) & 0x3f;



			m->addr &= GENMASK_ULL(55, lsb);

		}

	}



	if (mce_flags.smca) {

arch/x86/kernel/cpu/mcheck/mce_amd.c

+12 −1
Original line number Diff line number Diff line
@@ -561,9 +561,20 @@ __log_error(unsigned int bank, bool deferred_err, bool threshold_err, u64 misc) 
	if (threshold_err)

		m.misc = misc;



	if (m.status & MCI_STATUS_ADDRV)

	if (m.status & MCI_STATUS_ADDRV) {

		rdmsrl(msr_addr, m.addr);



		/*

		 * Extract [55:<lsb>] where lsb is the least significant

		 * *valid* bit of the address bits.

		 */

		if (mce_flags.smca) {

			u8 lsb = (m.addr >> 56) & 0x3f;



			m.addr &= GENMASK_ULL(55, lsb);

		}

	}



	if (mce_flags.smca) {

		rdmsrl(MSR_AMD64_SMCA_MCx_IPID(bank), m.ipid);