Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4eb68edb authored by Tomi Valkeinen's avatar Tomi Valkeinen
Browse files

OMAP: DSS2: DSI: fix dsi_dump_clocks() 



On OMAP4, reading DSI_PLL_CONFIGURATION2 register requires the L3 clock
(CIO_CLK_ICG) to PLL. Currently dsi_dump_clocks() tries to read that
register without enabling the L3 clock, leading to crash if DSI is not
in use.

The status of the bit being read from DSI_PLL_CONFIGURATION2 is
available from dsi_clock_info->use_sys_clk, so we can avoid the whole
problem by just using that.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent ae038af1

drivers/video/omap2/dss/dsi.c

+1 −5
Original line number Diff line number Diff line
@@ -1491,7 +1491,6 @@ void dsi_pll_uninit(void) 


void dsi_dump_clocks(struct seq_file *s)

{

	int clksel;

	struct dsi_clock_info *cinfo = &dsi.current_cinfo;

	enum dss_clk_source dispc_clk_src, dsi_clk_src;
@@ -1500,13 +1499,10 @@ void dsi_dump_clocks(struct seq_file *s) 


	enable_clocks(1);



	clksel = REG_GET(DSI_PLL_CONFIGURATION2, 11, 11);



	seq_printf(s,	"- DSI PLL -\n");



	seq_printf(s,	"dsi pll source = %s\n",

			clksel == 0 ?

			"dss_sys_clk" : "pclkfree");

			cinfo->use_sys_clk ? "dss_sys_clk" : "pclkfree");



	seq_printf(s,	"Fint\t\t%-16luregn %u\n", cinfo->fint, cinfo->regn);