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Commit 4e872ae2 authored by Ilija Hadzic's avatar Ilija Hadzic Committed by Alex Deucher
Browse files

drm/radeon: consolidate redundant macros and constants 



After refactoring the _cs logic, we ended up with many
macros and constants that #define the same thing.
Clean'em up.

Signed-off-by: default avatarIlija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: default avatarMarek Olšák <maraeo@gmail.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 012e976d

drivers/gpu/drm/radeon/evergreen_cs.c

+9 −9
Original line number Diff line number Diff line
@@ -2639,12 +2639,12 @@ int evergreen_cs_parse(struct radeon_cs_parser *p) 
		}

		p->idx += pkt.count + 2;

		switch (pkt.type) {

		case PACKET_TYPE0:

		case RADEON_PACKET_TYPE0:

			r = evergreen_cs_parse_packet0(p, &pkt);

			break;

		case PACKET_TYPE2:

		case RADEON_PACKET_TYPE2:

			break;

		case PACKET_TYPE3:

		case RADEON_PACKET_TYPE3:

			r = evergreen_packet3_check(p, &pkt);

			break;

		default:
@@ -3395,19 +3395,19 @@ int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib) 


	do {

		pkt.idx = idx;

		pkt.type = CP_PACKET_GET_TYPE(ib->ptr[idx]);

		pkt.count = CP_PACKET_GET_COUNT(ib->ptr[idx]);

		pkt.type = RADEON_CP_PACKET_GET_TYPE(ib->ptr[idx]);

		pkt.count = RADEON_CP_PACKET_GET_COUNT(ib->ptr[idx]);

		pkt.one_reg_wr = 0;

		switch (pkt.type) {

		case PACKET_TYPE0:

		case RADEON_PACKET_TYPE0:

			dev_err(rdev->dev, "Packet0 not allowed!\n");

			ret = -EINVAL;

			break;

		case PACKET_TYPE2:

		case RADEON_PACKET_TYPE2:

			idx += 1;

			break;

		case PACKET_TYPE3:

			pkt.opcode = CP_PACKET3_GET_OPCODE(ib->ptr[idx]);

		case RADEON_PACKET_TYPE3:

			pkt.opcode = RADEON_CP_PACKET3_GET_OPCODE(ib->ptr[idx]);

			ret = evergreen_vm_packet3_check(rdev, ib->ptr, &pkt);

			idx += pkt.count + 2;

			break;

drivers/gpu/drm/radeon/evergreend.h

+2 −11
Original line number Diff line number Diff line
@@ -980,16 +980,7 @@ 
/*

 * PM4

 */

#define	PACKET_TYPE0	0

#define	PACKET_TYPE1	1

#define	PACKET_TYPE2	2

#define	PACKET_TYPE3	3



#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)

#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)

#define CP_PACKET0_GET_REG(h) (((h) & 0xFFFF) << 2)

#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)

#define PACKET0(reg, n)	((PACKET_TYPE0 << 30) |				\

#define PACKET0(reg, n)	((RADEON_PACKET_TYPE0 << 30) |			\

			 (((reg) >> 2) & 0xFFFF) |			\

			 ((n) & 0x3FFF) << 16)

#define CP_PACKET2			0x80000000
@@ -998,7 +989,7 @@ 


#define PACKET2(v)	(CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))



#define PACKET3(op, n)	((PACKET_TYPE3 << 30) |				\

#define PACKET3(op, n)	((RADEON_PACKET_TYPE3 << 30) |			\

			 (((op) & 0xFF) << 8) |				\

			 ((n) & 0x3FFF) << 16)

drivers/gpu/drm/radeon/nid.h

+2 −11
Original line number Diff line number Diff line
@@ -474,16 +474,7 @@ 
/*

 * PM4

 */

#define	PACKET_TYPE0	0

#define	PACKET_TYPE1	1

#define	PACKET_TYPE2	2

#define	PACKET_TYPE3	3



#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)

#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)

#define CP_PACKET0_GET_REG(h) (((h) & 0xFFFF) << 2)

#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)

#define PACKET0(reg, n)	((PACKET_TYPE0 << 30) |				\

#define PACKET0(reg, n)	((RADEON_PACKET_TYPE0 << 30) |			\

			 (((reg) >> 2) & 0xFFFF) |			\

			 ((n) & 0x3FFF) << 16)

#define CP_PACKET2			0x80000000
@@ -492,7 +483,7 @@ 


#define PACKET2(v)	(CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))



#define PACKET3(op, n)	((PACKET_TYPE3 << 30) |				\

#define PACKET3(op, n)	((RADEON_PACKET_TYPE3 << 30) |			\

			 (((op) & 0xFF) << 8) |				\

			 ((n) & 0x3FFF) << 16)

drivers/gpu/drm/radeon/r100.c

+4 −4
Original line number Diff line number Diff line
@@ -1410,7 +1410,7 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p) 


	header = radeon_get_ib_value(p, h_idx);

	crtc_id = radeon_get_ib_value(p, h_idx + 5);

	reg = CP_PACKET0_GET_REG(header);

	reg = R100_CP_PACKET0_GET_REG(header);

	obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);

	if (!obj) {

		DRM_ERROR("cannot find crtc %d\n", crtc_id);
@@ -1997,7 +1997,7 @@ int r100_cs_parse(struct radeon_cs_parser *p) 
		}

		p->idx += pkt.count + 2;

		switch (pkt.type) {

		case PACKET_TYPE0:

		case RADEON_PACKET_TYPE0:

			if (p->rdev->family >= CHIP_R200)

				r = r100_cs_parse_packet0(p, &pkt,

					p->rdev->config.r100.reg_safe_bm,
@@ -2009,9 +2009,9 @@ int r100_cs_parse(struct radeon_cs_parser *p) 
					p->rdev->config.r100.reg_safe_bm_size,

					&r100_packet0_check);

			break;

		case PACKET_TYPE2:

		case RADEON_PACKET_TYPE2:

			break;

		case PACKET_TYPE3:

		case RADEON_PACKET_TYPE3:

			r = r100_packet3_check(p, &pkt);

			break;

		default:

drivers/gpu/drm/radeon/r100d.h

+0 −11
Original line number Diff line number Diff line
@@ -64,17 +64,6 @@ 
			 REG_SET(PACKET3_IT_OPCODE, (op)) |		\

			 REG_SET(PACKET3_COUNT, (n)))



#define	PACKET_TYPE0	0

#define	PACKET_TYPE1	1

#define	PACKET_TYPE2	2

#define	PACKET_TYPE3	3



#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)

#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)

#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)

#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)

#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)



/* Registers */

#define R_0000F0_RBBM_SOFT_RESET                     0x0000F0

#define   S_0000F0_SOFT_RESET_CP(x)                    (((x) & 0x1) << 0)