Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4e78b5a4 authored by Hareesh Gundu's avatar Hareesh Gundu Committed by Gerrit - the friendly Code Review server
Browse files

msm: kgsl: Set A6XX_CP_MEM_POOL_DBG_ADDR for A608 GPU



For A608 A6XX_CP_MEM_POOL_DBG_ADDR max value is 47.
Max is the HW recommended setting for A608.

Change-Id: I99678c8c6d04a47a55f4cae751e03ac78ad2fb0a
Signed-off-by: default avatarHareesh Gundu <hareeshg@codeaurora.org>
parent 47cb4b24
Loading
Loading
Loading
Loading
+7 −5
Original line number Diff line number Diff line
@@ -817,11 +817,13 @@ static void a6xx_start(struct adreno_device *adreno_dev)
		kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_1, 0x8040362C);
	}

	/* For a608 Mem pool size is reduced to 1/4 */
	if (adreno_is_a608(adreno_dev))
		kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, 0x30);
	else
		kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, 0x80);
	if (adreno_is_a608(adreno_dev)) {
		/* For a608 Mem pool size is reduced to 48 */
		kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, 48);
		kgsl_regwrite(device, A6XX_CP_MEM_POOL_DBG_ADDR, 47);
	} else {
		kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, 128);
	}

	/* Setting the primFifo thresholds values */
	if (adreno_is_a640(adreno_dev))