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Commit 4e287840 authored by Thadeu Lima de Souza Cascardo's avatar Thadeu Lima de Souza Cascardo Committed by Michael Ellerman
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powernv/iommu: disable IOMMU bypass with param iommu=nobypass 



When IOMMU bypass is enabled, a PCI device can read and write memory
that was not mapped by the driver without causing an EEH. That might
cause memory corruption, for example.

When we disable bypass, DMA reads and writes to addresses not mapped by
the IOMMU will cause an EEH, allowing us to debug such issues.

Signed-off-by: default avatarThadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
Reviewed-by: default avatarGavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 79872e35

Documentation/kernel-parameters.txt

+2 −0
Original line number Diff line number Diff line
@@ -1493,6 +1493,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 
		forcesac

		soft

		pt		[x86, IA-64]

		nobypass	[PPC/POWERNV]

			Disable IOMMU bypass, using IOMMU for PCI devices.





	io7=		[HW] IO7 for Marvel based alpha systems

arch/powerpc/platforms/powernv/pci-ioda.c

+25 −1
Original line number Diff line number Diff line
@@ -75,6 +75,28 @@ static void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, 
#define pe_info(pe, fmt, ...)					\

	pe_level_printk(pe, KERN_INFO, fmt, ##__VA_ARGS__)



static bool pnv_iommu_bypass_disabled __read_mostly;



static int __init iommu_setup(char *str)

{

	if (!str)

		return -EINVAL;



	while (*str) {

		if (!strncmp(str, "nobypass", 8)) {

			pnv_iommu_bypass_disabled = true;

			pr_info("PowerNV: IOMMU bypass window disabled.\n");

			break;

		}

		str += strcspn(str, ",");

		if (*str == ',')

			str++;

	}



	return 0;

}

early_param("iommu", iommu_setup);



/*

 * stdcix is only supposed to be used in hypervisor real mode as per

 * the architecture spec
@@ -1351,7 +1373,9 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, 
		pnv_ioda_setup_bus_dma(pe, pe->pbus, true);



	/* Also create a bypass window */

	if (!pnv_iommu_bypass_disabled)

		pnv_pci_ioda2_setup_bypass_pe(phb, pe);



	return;

fail:

	if (pe->tce32_seg >= 0)