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Commit 4d2b86d1 authored by Tony Lijo Jose's avatar Tony Lijo Jose
Browse files

ARM: dts: msm: change csid clock to svs plus 



Increase the csid clock to svs plus to support data
rate of all sensor resolutions.

CRs-Fixed: 2314636

Change-Id: Ib79f3b98295a8cb573d7303d7d54e833de84ae6a
Signed-off-by: default avatarTony Lijo Jose <tjose@codeaurora.org>
parent 10cda55d

arch/arm64/boot/dts/qcom/sm6150-camera.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -625,9 +625,9 @@ 
			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_IFE_0_AXI_CLK>;

		clock-rates =

			<0 0 0 0 0 0 200000000 0 0 0 360000000 0 0>,

			<0 0 0 0 0 0 320000000 0 0 0 432000000 0 0>,

			<0 0 0 0 0 0 540000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "turbo";

		clock-cntl-level = "svs_l1", "turbo";

		src-clock-name = "ife_csid_clk_src";

		status = "ok";

	};
@@ -712,9 +712,9 @@ 
			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_IFE_1_AXI_CLK>;

		clock-rates =

			<0 0 0 0 0 0 200000000 0 0 0 360000000 0 0>,

			<0 0 0 0 0 0 320000000 0 0 0 432000000 0 0>,

			<0 0 0 0 0 0 540000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "turbo";

		clock-cntl-level = "svs_l1", "turbo";

		src-clock-name = "ife_csid_clk_src";

		status = "ok";

	};
@@ -796,9 +796,9 @@ 
			<&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>;

		clock-rates =

			<0 0 0 0 0 0 200000000 0 0 0 360000000 0>,

			<0 0 0 0 0 0 320000000 0 0 0 432000000 0 0>,

			<0 0 0 0 0 0 540000000 0 0 0 600000000 0>;

		clock-cntl-level = "svs", "turbo";

		clock-cntl-level = "svs_l1", "turbo";

		src-clock-name = "ife_csid_clk_src";

		status = "ok";

	};