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Commit 4d107d3b authored by Lucas Stach's avatar Lucas Stach Committed by Bjorn Helgaas
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PCI: imx6: Move link up check into imx6_pcie_wait_for_link() 

imx6_pcie_link_up() previously used usleep_range() to wait for the link to
come up.  Since it may be called while holding the config spinlock, the
sleep causes a "BUG: scheduling while atomic" error.

Instead of waiting for the link to come up in imx6_pcie_link_up(), do the
waiting in imx6_pcie_wait_for_link(), where we're not holding a lock and
sleeping is allowed.

[bhelgaas: changelog, references to bugzilla and f95d3ae7]
Link: https://bugzilla.kernel.org/show_bug.cgi?id=100031


Fixes: f95d3ae7 ("PCI: imx6: Wait for retraining")
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent a77c5422

drivers/pci/host/pci-imx6.c

+22 −38
Original line number Diff line number Diff line
@@ -349,10 +349,28 @@ static int imx6_pcie_wait_for_link(struct pcie_port *pp) 
{

	unsigned int retries;



	/*

	 * Test if the PHY reports that the link is up and also that the LTSSM

	 * training finished. There are three possible states of the link when

	 * this code is called:

	 * 1) The link is DOWN (unlikely)

	 *    The link didn't come up yet for some reason. This usually means

	 *    we have a real problem somewhere, if it happens with a peripheral

	 *    connected. This state calls for inspection of the DEBUG registers.

	 * 2) The link is UP, but still in LTSSM training

	 *    Wait for the training to finish, which should take a very short

	 *    time. If the training does not finish, we have a problem and we

	 *    need to inspect the DEBUG registers. If the training does finish,

	 *    the link is up and operating correctly.

	 * 3) The link is UP and no longer in LTSSM training

	 *    The link is up and operating correctly.

	 */

	for (retries = 0; retries < 200; retries++) {

		if (dw_pcie_link_up(pp))

		u32 reg = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1);

		if ((reg & PCIE_PHY_DEBUG_R1_XMLH_LINK_UP) &&

		    !(reg & PCIE_PHY_DEBUG_R1_XMLH_LINK_IN_TRAINING))

			return 0;

		usleep_range(100, 1000);

		usleep_range(1000, 2000);

	}



	return -EINVAL;
@@ -467,42 +485,8 @@ static void imx6_pcie_host_init(struct pcie_port *pp) 


static int imx6_pcie_link_up(struct pcie_port *pp)

{

	u32 rc;

	int count = 5;



	/*

	 * Test if the PHY reports that the link is up and also that the LTSSM

	 * training finished. There are three possible states of the link when

	 * this code is called:

	 * 1) The link is DOWN (unlikely)

	 *     The link didn't come up yet for some reason. This usually means

	 *     we have a real problem somewhere. Reset the PHY and exit. This

	 *     state calls for inspection of the DEBUG registers.

	 * 2) The link is UP, but still in LTSSM training

	 *     Wait for the training to finish, which should take a very short

	 *     time. If the training does not finish, we have a problem and we

	 *     need to inspect the DEBUG registers. If the training does finish,

	 *     the link is up and operating correctly.

	 * 3) The link is UP and no longer in LTSSM training

	 *     The link is up and operating correctly.

	 */

	while (1) {

		rc = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1);

		if (!(rc & PCIE_PHY_DEBUG_R1_XMLH_LINK_UP))

			break;

		if (!(rc & PCIE_PHY_DEBUG_R1_XMLH_LINK_IN_TRAINING))

			return 1;

		if (!count--)

			break;

		dev_dbg(pp->dev, "Link is up, but still in training\n");

		/*

		 * Wait a little bit, then re-check if the link finished

		 * the training.

		 */

		usleep_range(1000, 2000);

	}



	return 0;

	return readl(pp->dbi_base + PCIE_PHY_DEBUG_R1) &

			PCIE_PHY_DEBUG_R1_XMLH_LINK_UP;

}



static struct pcie_host_ops imx6_pcie_host_ops = {