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Commit 4b47c3f5 authored by Mark yao's avatar Mark yao Committed by Mike Turquette
Browse files

clk: rockchip: rk3288: add reset indices for SOFTRST9-11 



The patch add the rest of the indices of the additional reset
registers from the updated TRM.

Signed-off-by: default avatarMark yao <mark.yao@rock-chips.com>
Reviewed-by: default avatarDoug Anderson <dianders@chromium.org>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 7d1311b9

include/dt-bindings/clock/rk3288-cru.h

+43 −0
Original line number Diff line number Diff line
@@ -276,3 +276,46 @@ 
#define SRST_USBHOST1_CON	140

#define SRST_USB_ADP		141

#define SRST_ACC_EFUSE		142



#define SRST_CORESIGHT		144

#define SRST_PD_CORE_AHB_NOC	145

#define SRST_PD_CORE_APB_NOC	146

#define SRST_PD_CORE_MP_AXI	147

#define SRST_GIC		148

#define SRST_LCDC_PWM0		149

#define SRST_LCDC_PWM1		150

#define SRST_VIO0_H2P_BRG	151

#define SRST_VIO1_H2P_BRG	152

#define SRST_RGA_H2P_BRG	153

#define SRST_HEVC		154

#define SRST_TSADC		159



#define SRST_DDRPHY0		160

#define SRST_DDRPHY0_APB	161

#define SRST_DDRCTRL0		162

#define SRST_DDRCTRL0_APB	163

#define SRST_DDRPHY0_CTRL	164

#define SRST_DDRPHY1		165

#define SRST_DDRPHY1_APB	166

#define SRST_DDRCTRL1		167

#define SRST_DDRCTRL1_APB	168

#define SRST_DDRPHY1_CTRL	169

#define SRST_DDRMSCH0		170

#define SRST_DDRMSCH1		171

#define SRST_CRYPTO		174

#define SRST_C2C_HOST		175



#define SRST_LCDC1_AXI		176

#define SRST_LCDC1_AHB		177

#define SRST_LCDC1_DCLK		178

#define SRST_UART0		179

#define SRST_UART1		180

#define SRST_UART2		181

#define SRST_UART3		182

#define SRST_UART4		183

#define SRST_SIMC		186

#define SRST_PS2C		187

#define SRST_TSP		188

#define SRST_TSP_CLKIN0		189

#define SRST_TSP_CLKIN1		190

#define SRST_TSP_27M		191