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Commit 4b2523c1 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'enc28j60-small-improvements' 



Michael Heimpold says:

====================
net: ethernet: enc28j60: small improvements

This series of two patches adds the following improvements to the driver:

1) Rework the central SPI read function so that it is compatible with
   SPI masters which only support half duplex transfers.

2) Add a device tree binding for the driver.

Changelog:

v3: * renamed and improved binding documentation as
      suggested by Rob Herring

v2: * took care of Arnd Bergmann's review comments
      - allow to specify MAC address via DT
      - unconditionally define DT id table
    * increased the driver version minor number
    * driver author's email address bounces, removed from address list

v1: * Initial submission
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents f4b05d27 2dd355a0

Documentation/devicetree/bindings/net/microchip,enc28j60.txt

0 → 100644
+59 −0
Original line number Diff line number Diff line 
* Microchip ENC28J60



This is a standalone 10 MBit ethernet controller with SPI interface.



For each device connected to a SPI bus, define a child node within

the SPI master node.



Required properties:

- compatible: Should be "microchip,enc28j60"

- reg: Specify the SPI chip select the ENC28J60 is wired to

- interrupt-parent: Specify the phandle of the source interrupt, see interrupt

                    binding documentation for details. Usually this is the GPIO bank

                    the interrupt line is wired to.

- interrupts: Specify the interrupt index within the interrupt controller (referred

              to above in interrupt-parent) and interrupt type. The ENC28J60 natively

              generates falling edge interrupts, however, additional board logic

              might invert the signal.

- pinctrl-names: List of assigned state names, see pinctrl binding documentation.

- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,

             see also generic and your platform specific pinctrl binding

             documentation.



Optional properties:

- spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.

  According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,

  board designs may need to limit this value.

- local-mac-address: See ethernet.txt in the same directory.





Example (for NXP i.MX28 with pin control stuff for GPIO irq):



        ssp2: ssp@80014000 {

                compatible = "fsl,imx28-spi";

                pinctrl-names = "default";

                pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;

                status = "okay";



                enc28j60: ethernet@0 {

                        compatible = "microchip,enc28j60";

                        pinctrl-names = "default";

                        pinctrl-0 = <&enc28j60_pins>;

                        reg = <0>;

                        interrupt-parent = <&gpio3>;

                        interrupts = <3 IRQ_TYPE_EDGE_FALLING>;

                        spi-max-frequency = <12000000>;

                };

        };



        pinctrl@80018000 {

                enc28j60_pins: enc28j60_pins@0 {

                        reg = <0>;

                        fsl,pinmux-ids = <

                                MX28_PAD_AUART0_RTS__GPIO_3_3    /* Interrupt */

                        >;

                        fsl,drive-strength = <MXS_DRIVE_4mA>;

                        fsl,voltage = <MXS_VOLTAGE_HIGH>;

                        fsl,pull-up = <MXS_PULL_DISABLE>;

                };

        };

drivers/net/ethernet/microchip/enc28j60.c

+26 −8
Original line number Diff line number Diff line
@@ -28,11 +28,12 @@ 
#include <linux/skbuff.h>

#include <linux/delay.h>

#include <linux/spi/spi.h>

#include <linux/of_net.h>



#include "enc28j60_hw.h"



#define DRV_NAME	"enc28j60"

#define DRV_VERSION	"1.01"

#define DRV_VERSION	"1.02"



#define SPI_OPLEN	1
@@ -89,22 +90,26 @@ spi_read_buf(struct enc28j60_net *priv, int len, u8 *data) 
{

	u8 *rx_buf = priv->spi_transfer_buf + 4;

	u8 *tx_buf = priv->spi_transfer_buf;

	struct spi_transfer t = {

	struct spi_transfer tx = {

		.tx_buf = tx_buf,

		.len = SPI_OPLEN,

	};

	struct spi_transfer rx = {

		.rx_buf = rx_buf,

		.len = SPI_OPLEN + len,

		.len = len,

	};

	struct spi_message msg;

	int ret;



	tx_buf[0] = ENC28J60_READ_BUF_MEM;

	tx_buf[1] = tx_buf[2] = tx_buf[3] = 0;	/* don't care */



	spi_message_init(&msg);

	spi_message_add_tail(&t, &msg);

	spi_message_add_tail(&tx, &msg);

	spi_message_add_tail(&rx, &msg);



	ret = spi_sync(priv->spi, &msg);

	if (ret == 0) {

		memcpy(data, &rx_buf[SPI_OPLEN], len);

		memcpy(data, rx_buf, len);

		ret = msg.status;

	}

	if (ret && netif_msg_drv(priv))
@@ -1544,6 +1549,7 @@ static int enc28j60_probe(struct spi_device *spi) 
{

	struct net_device *dev;

	struct enc28j60_net *priv;

	const void *macaddr;

	int ret = 0;



	if (netif_msg_drv(&debug))
@@ -1575,6 +1581,11 @@ static int enc28j60_probe(struct spi_device *spi) 
		ret = -EIO;

		goto error_irq;

	}



	macaddr = of_get_mac_address(spi->dev.of_node);

	if (macaddr)

		ether_addr_copy(dev->dev_addr, macaddr);

	else

		eth_hw_addr_random(dev);

	enc28j60_set_hw_macaddr(dev);
@@ -1630,9 +1641,16 @@ static int enc28j60_remove(struct spi_device *spi) 
	return 0;

}



static const struct of_device_id enc28j60_dt_ids[] = {

	{ .compatible = "microchip,enc28j60" },

	{ /* sentinel */ }

};

MODULE_DEVICE_TABLE(of, enc28j60_dt_ids);



static struct spi_driver enc28j60_driver = {

	.driver = {

		.name = DRV_NAME,

		.of_match_table = enc28j60_dt_ids,

	 },

	.probe = enc28j60_probe,

	.remove = enc28j60_remove,