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Commit 4a684f1b authored by Manaf Meethalavalappu Pallikunhi's avatar Manaf Meethalavalappu Pallikunhi
Browse files

ARM: dts: msm: Add default thermal zone rules for QCS405 



Add default thermal zone rules like cpu frequency mitigation,
core isolate mitigation, vdd restriction at cold temperature etc.
for QCS405.

Change-Id: I2a288b74377e75cb808b6edd34eccbcd72df091b
Signed-off-by: default avatarManaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
parent 881ea4ff

arch/arm64/boot/dts/qcom/qcs405-cpu.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ 
			reg = <0x100>;

			enable-method = "psci";

			next-level-cache = <&L2_1>;

			#cooling-cells = <2>;

			L2_1: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-level = <2>;
@@ -65,6 +66,7 @@ 
			reg = <0x101>;

			enable-method = "psci";

			next-level-cache = <&L2_1>;

			#cooling-cells = <2>;

			L1_I_101: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;
@@ -81,6 +83,7 @@ 
			reg = <0x102>;

			enable-method = "psci";

			next-level-cache = <&L2_1>;

			#cooling-cells = <2>;

			L1_I_102: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;
@@ -97,6 +100,7 @@ 
			reg = <0x103>;

			enable-method = "psci";

			next-level-cache = <&L2_1>;

			#cooling-cells = <2>;

			L1_I_103: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

arch/arm64/boot/dts/qcom/qcs405-rumi.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -81,6 +81,10 @@ 
	rpm-standalone;

};



&thermal_zones {

	/delete-node/ aoss-lowf;

};



#include "qcs405-stub-regulator.dtsi"



&sdhc_1 {

arch/arm64/boot/dts/qcom/qcs405-thermal.dtsi

+171 −0
Original line number Diff line number Diff line
@@ -182,4 +182,175 @@ 
			};

		};

	};



	cpuss-max-step {

		polling-delay-passive = <50>;

		polling-delay = <100>;

		thermal-governor = "step_wise";

		trips {

			cpu_trip:cpu-trip {

				temperature = <85000>;

				hysteresis = <0>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu0_cdev {

				trip = <&cpu_trip>;

				cooling-device =

					<&CPU0 THERMAL_NO_LIMIT

						(THERMAL_MAX_LIMIT-1)>;

			};

			cpu1_cdev {

				trip = <&cpu_trip>;

				cooling-device =

					<&CPU1 THERMAL_NO_LIMIT

						(THERMAL_MAX_LIMIT-1)>;

			};

			cpu2_cdev {

				trip = <&cpu_trip>;

				cooling-device =

					<&CPU2 THERMAL_NO_LIMIT

						(THERMAL_MAX_LIMIT-1)>;

			};

			cpu3_cdev {

				trip = <&cpu_trip>;

				cooling-device =

					<&CPU3 THERMAL_NO_LIMIT

						(THERMAL_MAX_LIMIT-1)>;

			};

		};

	};



	gpu-step {

		polling-delay-passive = <250>;

		polling-delay = <0>;

		thermal-sensors = <&tsens0 6>;

		thermal-governor = "step_wise";

		trips {

			gpu_step_trip: gpu-step-trip {

				temperature = <95000>;

				hysteresis = <0>;

				type = "passive";

			};

		};

	};



	cpuss-0-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-sensors = <&tsens0 1>;

		thermal-governor = "step_wise";

		trips {

			cpuss_0_step_trip: cpuss-0-step-trip {

				temperature = <105000>;

				hysteresis = <15000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu0_cdev {

				trip = <&cpuss_0_step_trip>;

				cooling-device =

					<&CPU0 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpuss-1-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-sensors = <&tsens0 2>;

		thermal-governor = "step_wise";

		trips {

			cpuss_1_step_trip: cpuss-1-step-trip {

				temperature = <105000>;

				hysteresis = <15000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu1_cdev {

				trip = <&cpuss_1_step_trip>;

				cooling-device =

					<&CPU1 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpuss-2-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-sensors = <&tsens0 3>;

		thermal-governor = "step_wise";

		trips {

			cpuss_2_step_trip: cpuss-2-step-trip {

				temperature = <105000>;

				hysteresis = <15000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu2_cdev {

				trip = <&cpuss_2_step_trip>;

				cooling-device =

					<&CPU2 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	cpuss-3-step {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-sensors = <&tsens0 4>;

		thermal-governor = "step_wise";

		trips {

			cpuss_3_step_trip: cpuss-3-step-trip {

				temperature = <105000>;

				hysteresis = <15000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu3_cdev {

				trip = <&cpuss_3_step_trip>;

				cooling-device =

					<&CPU3 THERMAL_MAX_LIMIT

						THERMAL_MAX_LIMIT>;

			};

		};

	};



	aoss-lowf {

		polling-delay-passive = <0>;

		polling-delay = <0>;

		thermal-governor = "low_limits_floor";

		thermal-sensors = <&tsens0 0>;

		tracks-low;

		trips {

			aoss_lowf: aoss-lowf {

				temperature = <5000>;

				hysteresis = <5000>;

				type = "passive";

			};

		};

		cooling-maps {

			cpu0_cdev {

				trip = <&aoss_lowf>;

				cooling-device = <&CPU0 (THERMAL_MAX_LIMIT-2)

							(THERMAL_MAX_LIMIT-2)>;

			};

			cx_vdd_cdev {

				trip = <&aoss_lowf>;

				cooling-device = <&cx_cdev 0 0>;

			};

			modem_vdd_cdev {

				trip = <&aoss_lowf>;

				cooling-device = <&modem_vdd 0 0>;

			};

		};

	};

};

arch/arm64/boot/dts/qcom/qcs405.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -658,10 +658,10 @@ 
};



#include "qcs405-gdsc.dtsi"

#include "qcs405-thermal.dtsi"

#include "pms405.dtsi"

#include "pms405-rpm-regulator.dtsi"

#include "qcs405-regulator.dtsi"

#include "qcs405-thermal.dtsi"



&gdsc_mdss {

	status = "ok";