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Commit 49deffe0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARC updates from Vineet Gupta:

 - ARCv2 support for native 64-bit atomics using LLOCK/SCONDD
   instructions

 - Support for upcoming 3.0 release of HS38 cores

 - Dwarf unwindinder improvements:
   - enable unwinding of hand written assembler code using CFI
     pseudo-ops
   - switch to .eh_frame (as opposed to historic .debug_frame)
   - get rid of a bunch of adhoc band-aids in the process

 - Misc fixes:
   - perf supporting generic cache-references and cache-misses (Alexey)
   - default NODE_SHIFT (Noam Camus)
   - usage of KFLAG instruction to set IE (Yuriy)

 - Platforms:
   - Add "model" property across the DT (Alexey)
   - Enable MODULE_* in defconfigs

* tag 'arc-4.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
  ARC: [plat*] enables MODULE*
  ARCv2: fix local_save_flags
  ARC: CONFIG_NODES_SHIFT fix default values
  ARCv2: intc: Use kflag if STATUS32.IE must be reset
  ARC: .exit.* sections can be discarded in .eh_frame regime
  ARC: dw2 unwind: enable cfi pseudo ops in string lib
  ARC: dw2 unwind: add infrastructure for adding cfi pseudo ops to asm
  ARC: entry: make ret_from_system_call local label
  ARC: dw2 unwind: don't force dwarf 2
  ARC: dw2 unwind: switch to .eh_frame based unwinding
  ARC: dw2 unwind: factor CIE specifics for .eh_frame/.debug_frame
  ARC: module: support R_ARC_32_PCREL relocation
  arc: perf: Enable generic "cache-references" and "cache-misses" events
  ARC: [plat-eznps] add missing atomic_fetch_xxx operations
  ARCv2: Implement atomic64 based on LLOCKD/SCONDD instructions
  ARCv2: Support dynamic peripheral address space in HS38 rel 3.0 cores
  ARCv2: identify HS38 rel 3.0 cores
  ARCv2: Add support for ZeBu Emulation platform for HS cores
  arc: Add "model" properly in device tree description of all boards
parents 5419e783 ef25bacb
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+3 −3
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ config ARC
	select CLKSRC_OF
	select CLONE_BACKWARDS
	select COMMON_CLK
	select GENERIC_ATOMIC64
	select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC)
	select GENERIC_CLOCKEVENTS
	select GENERIC_FIND_FIRST_BIT
	# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
@@ -353,8 +353,8 @@ endchoice

config NODES_SHIFT
	int "Maximum NUMA Nodes (as a power of 2)"
	default "1" if !DISCONTIGMEM
	default "2" if DISCONTIGMEM
	default "0" if !DISCONTIGMEM
	default "1" if DISCONTIGMEM
	depends on NEED_MULTIPLE_NODES
	---help---
	  Accessing memory beyond 1GB (with or w/o PAE) requires 2 memory
+2 −5
Original line number Diff line number Diff line
@@ -47,7 +47,6 @@ endif

upto_gcc44    :=  $(call cc-ifversion, -le, 0404, y)
atleast_gcc44 :=  $(call cc-ifversion, -ge, 0404, y)
atleast_gcc48 :=  $(call cc-ifversion, -ge, 0408, y)

cflags-$(atleast_gcc44)			+= -fsection-anchors

@@ -66,10 +65,8 @@ endif

endif

# By default gcc 4.8 generates dwarf4 which kernel unwinder can't grok
ifeq ($(atleast_gcc48),y)
cflags-$(CONFIG_ARC_DW2_UNWIND)		+= -gdwarf-2
endif
cfi := $(call as-instr,.cfi_startproc\n.cfi_endproc,-DARC_DW2_UNWIND_AS_CFI)
cflags-$(CONFIG_ARC_DW2_UNWIND)		+= -fasynchronous-unwind-tables $(cfi)

ifndef CONFIG_CC_OPTIMIZE_FOR_SIZE
# Generic build system uses -O2, we want -O3
+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@
/include/ "abilis_tb100.dtsi"

/ {
	model = "abilis,tb100";
	chosen {
		bootargs = "earlycon=uart8250,mmio32,0xff100000,9600n8 console=ttyS0,9600n8";
	};
+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@
/include/ "abilis_tb101.dtsi"

/ {
	model = "abilis,tb101";
	chosen {
		bootargs = "earlycon=uart8250,mmio32,0xff100000,9600n8 console=ttyS0,9600n8";
	};
+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@
/include/ "axs10x_mb.dtsi"

/ {
	model = "snps,axs101";
	compatible = "snps,axs101", "snps,arc-sdp";

	chosen {
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