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Commit 493e6874 authored by Will Deacon's avatar Will Deacon Committed by Catalin Marinas
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arm64: barriers: wire up new barrier options



Now that all callers of the barrier macros are updated to pass the
mandatory options, update the macros so the option is actually used.

Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 98f7685e
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+7 −7
Original line number Diff line number Diff line
@@ -25,12 +25,12 @@
#define wfi()		asm volatile("wfi" : : : "memory")

#define isb()		asm volatile("isb" : : : "memory")
#define dmb(opt)	asm volatile("dmb sy" : : : "memory")
#define dsb(opt)	asm volatile("dsb sy" : : : "memory")
#define dmb(opt)	asm volatile("dmb " #opt : : : "memory")
#define dsb(opt)	asm volatile("dsb " #opt : : : "memory")

#define mb()		dsb(sy)
#define rmb()		asm volatile("dsb ld" : : : "memory")
#define wmb()		asm volatile("dsb st" : : : "memory")
#define rmb()		dsb(ld)
#define wmb()		dsb(st)

#ifndef CONFIG_SMP
#define smp_mb()	barrier()
@@ -54,9 +54,9 @@ do { \

#else

#define smp_mb()	asm volatile("dmb ish" : : : "memory")
#define smp_rmb()	asm volatile("dmb ishld" : : : "memory")
#define smp_wmb()	asm volatile("dmb ishst" : : : "memory")
#define smp_mb()	dmb(ish)
#define smp_rmb()	dmb(ishld)
#define smp_wmb()	dmb(ishst)

#define smp_store_release(p, v)						\
do {									\