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Commit 4938ca90 authored by Zhao Yan's avatar Zhao Yan Committed by Zhenyu Wang
Browse files

drm/i915/gvt: handle force-nonpriv registers, cmd parser part 



this patch adds force non-priv registers check in LRI cmds handler

v4:
transform is_force_nonpriv_mmio() from macro to inline fuction to eliminate
checkpatch warning

v3:
per zhenyu's comment, fix some style warnings

v2:
per zhenyu's comment, refine the code to remove cascaded ifs

Signed-off-by: default avatarZhao Yan <yan.y.zhao@intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
parent 6aef6603

drivers/gpu/drm/i915/gvt/cmd_parser.c

+23 −0
Original line number Diff line number Diff line
@@ -817,6 +817,25 @@ static bool is_shadowed_mmio(unsigned int offset) 
	return ret;

}



static inline bool is_force_nonpriv_mmio(unsigned int offset)

{

	return (offset >= 0x24d0 && offset < 0x2500);

}



static int force_nonpriv_reg_handler(struct parser_exec_state *s,

				     unsigned int offset, unsigned int index)

{

	struct intel_gvt *gvt = s->vgpu->gvt;

	unsigned int data = cmd_val(s, index + 1);



	if (!intel_gvt_in_force_nonpriv_whitelist(gvt, data)) {

		gvt_err("Unexpected forcenonpriv 0x%x LRI write, value=0x%x\n",

			offset, data);

		return -EINVAL;

	}

	return 0;

}



static int cmd_reg_handler(struct parser_exec_state *s,

	unsigned int offset, unsigned int index, char *cmd)

{
@@ -841,6 +860,10 @@ static int cmd_reg_handler(struct parser_exec_state *s, 
		return 0;

	}



	if (is_force_nonpriv_mmio(offset) &&

	    force_nonpriv_reg_handler(s, offset, index))

		return -EINVAL;



	if (offset == i915_mmio_reg_offset(DERRMR) ||

		offset == i915_mmio_reg_offset(FORCEWAKE_MT)) {

		/* Writing to HW VGT_PVINFO_PAGE offset will be discarded */

drivers/gpu/drm/i915/gvt/handlers.c

+17 −0
Original line number Diff line number Diff line
@@ -2988,3 +2988,20 @@ int intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, 
	write_vreg(vgpu, offset, p_data, bytes);

	return 0;

}



/**

 * intel_gvt_in_force_nonpriv_whitelist - if a mmio is in whitelist to be

 * force-nopriv register

 *

 * @gvt: a GVT device

 * @offset: register offset

 *

 * Returns:

 * True if the register is in force-nonpriv whitelist;

 * False if outside;

 */

bool intel_gvt_in_force_nonpriv_whitelist(struct intel_gvt *gvt,

					  unsigned int offset)

{

	return in_whitelist(offset);

}

drivers/gpu/drm/i915/gvt/mmio.h

+3 −0
Original line number Diff line number Diff line
@@ -107,4 +107,7 @@ int intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, 
				 void *p_data, unsigned int bytes);

int intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,

				  void *p_data, unsigned int bytes);



bool intel_gvt_in_force_nonpriv_whitelist(struct intel_gvt *gvt,

					  unsigned int offset);

#endif