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Commit 48cd8bcc authored by Qiwei Liu's avatar Qiwei Liu
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ARM: dts: msm: modify llcc bw range for sm8150 



LLCC BW is the total BW for LLC+DDR, previous range is
too small, modify to use the same upper limit as DDR BW.

Change-Id: I7fcaf921878dda229c60bd9e96447b61d0e2e9aa
Signed-off-by: default avatarQiwei Liu <qiweil@codeaurora.org>
parent af372cc5

arch/arm64/boot/dts/qcom/sm8150-vidc.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ 
			qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;

			qcom,bus-slave = <MSM_BUS_SLAVE_LLCC>;

			qcom,bus-governor = "msm-vidc-llcc";

			qcom,bus-range-kbps = <1000 1326000>;

			qcom,bus-range-kbps = <1000 6533000>;

		};



		/* MMUs */