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Commit 47c95a46 authored by Bin Gao's avatar Bin Gao Committed by Thomas Gleixner
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x86/tsc: Add X86_FEATURE_TSC_KNOWN_FREQ flag 



The X86_FEATURE_TSC_RELIABLE flag in Linux kernel implies both reliable
(at runtime) and trustable (at calibration). But reliable running and
trustable calibration independent of each other. 

Add a new flag X86_FEATURE_TSC_KNOWN_FREQ, which denotes that the frequency
is known (via MSR/CPUID). This flag is only meant to skip the long term
calibration on systems which have a known frequency.

Add X86_FEATURE_TSC_KNOWN_FREQ to the skip the delayed calibration and
leave X86_FEATURE_TSC_RELIABLE in place.

After converting the existing users of X86_FEATURE_TSC_RELIABLE to use
either both flags or just X86_FEATURE_TSC_KNOWN_FREQ we can seperate the
functionality.

Suggested-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarBin Gao <bin.gao@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1479241644-234277-2-git-send-email-bin.gao@linux.intel.com


Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent a25f0944

arch/x86/include/asm/cpufeatures.h

+1 −0
Original line number Diff line number Diff line
@@ -106,6 +106,7 @@ 
#define X86_FEATURE_APERFMPERF	( 3*32+28) /* APERFMPERF */

#define X86_FEATURE_EAGER_FPU	( 3*32+29) /* "eagerfpu" Non lazy FPU restore */

#define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */

#define X86_FEATURE_TSC_KNOWN_FREQ ( 3*32+31) /* TSC has known frequency */



/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */

#define X86_FEATURE_XMM3	( 4*32+ 0) /* "pni" SSE-3 */

arch/x86/kernel/tsc.c

+8 −3
Original line number Diff line number Diff line
@@ -1283,10 +1283,15 @@ static int __init init_tsc_clocksource(void) 
		clocksource_tsc.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;



	/*

	 * Trust the results of the earlier calibration on systems

	 * exporting a reliable TSC.

	 * When TSC frequency is known (retrieved via MSR or CPUID), we skip

	 * the refined calibration and directly register it as a clocksource.

	 *

	 * We still keep the TSC_RELIABLE flag here to avoid regressions -

	 * it will be removed after all the conversion for other code paths

	 * connected to this flag is done.

	 */

	if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) {

	if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE) ||

		boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) {

		clocksource_register_khz(&clocksource_tsc, tsc_khz);

		return 0;

	}