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Commit 470bbff0 authored by Lokesh Vutla's avatar Lokesh Vutla Committed by Santosh Shilimkar
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dt-bindings: ti,edma: Add 66AK2G specific information 



Update ti,edma binding documentation to reflect 66AK2G specific
properties.

Signed-off-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <ssantosh@kernel.org>
parent 87b7c3ac

Documentation/devicetree/bindings/dma/ti-edma.txt

+90 −5
Original line number Diff line number Diff line
@@ -9,7 +9,12 @@ execute the actual DMA tansfer. 
eDMA3 Channel Controller



Required properties:

- compatible:	"ti,edma3-tpcc" for the channel controller(s)

--------------------

- compatible:	Should be:

		- "ti,edma3-tpcc" for the channel controller(s) on OMAP,

		  AM33xx and AM43xx SoCs.

		- "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the

		  channel controller(s) on 66AK2G.

- #dma-cells:	Should be set to <2>. The first number is the DMA request

		number and the second is the TC the channel is serviced on.

- reg:		Memory map of eDMA CC
@@ -19,8 +24,19 @@ Required properties: 
- ti,tptcs:	List of TPTCs associated with the eDMA in the following form:

		<&tptc_phandle TC_priority_number>. The highest priority is 0.



SoC-specific Required properties:

--------------------------------

The following are mandatory properties for OMAP, AM33xx and AM43xx SoCs only:

- ti,hwmods:	Name of the hwmods associated to the eDMA CC.



The following are mandatory properties for 66AK2G SoCs only:

- power-domains:Should contain a phandle to a PM domain provider node

		and an args specifier containing the device id

		value. This property is as per the binding,

		Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt



Optional properties:

- ti,hwmods:	Name of the hwmods associated to the eDMA CC

-------------------

- ti,edma-memcpy-channels: List of channels allocated to be used for memcpy, iow

		these channels will be SW triggered channels. See example.

- ti,edma-reserved-slot-ranges: PaRAM slot ranges which should not be used by
@@ -31,17 +47,34 @@ Optional properties: 
eDMA3 Transfer Controller



Required properties:

- compatible:	"ti,edma3-tptc" for the transfer controller(s)

--------------------

- compatible:	Should be:

		- "ti,edma3-tptc" for the transfer controller(s) on OMAP,

		  AM33xx and AM43xx SoCs.

		- "ti,k2g-edma3-tptc", "ti,edma3-tptc" for the

		  transfer controller(s) on 66AK2G.

- reg:		Memory map of eDMA TC

- interrupts:	Interrupt number for TCerrint.



SoC-specific Required properties:

--------------------------------

The following are mandatory properties for OMAP, AM33xx and AM43xx SoCs only:

- ti,hwmods:	Name of the hwmods associated to the eDMA TC.



The following are mandatory properties for 66AK2G SoCs only:

- power-domains:Should contain a phandle to a PM domain provider node

		and an args specifier containing the device id

		value. This property is as per the binding,

		Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt



Optional properties:

- ti,hwmods:	Name of the hwmods associated to the given eDMA TC

-------------------

- interrupt-names: "edma3_tcerrint"



------------------------------------------------------------------------------

Example:

Examples:



1.

edma: edma@49000000 {

	compatible = "ti,edma3-tpcc";

	ti,hwmods = "tpcc";
@@ -109,6 +142,58 @@ mcasp0: mcasp@48038000 { 
	dma-names = "tx", "rx";

};



2.

edma1: edma@02728000 {

	compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";

	reg =	<0x02728000 0x8000>;

	reg-names = "edma3_cc";

	interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,

			<GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,

			<GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;

	interrupt-names = "edma3_ccint", "emda3_mperr",

			  "edma3_ccerrint";

	dma-requests = <64>;

	#dma-cells = <2>;



	ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;



	/*

	 * memcpy is disabled, can be enabled with:

	 * ti,edma-memcpy-channels = <12 13 14 15>;

	 * for example.

	 */



	power-domains = <&k2g_pds 0x4f>;

};



edma1_tptc0: tptc@027b0000 {

	compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";

	reg =	<0x027b0000 0x400>;

	power-domains = <&k2g_pds 0x4f>;

};



edma1_tptc1: tptc@027b8000 {

	compatible = "ti, k2g-edma3-tptc", "ti,edma3-tptc";

	reg =	<0x027b8000 0x400>;

	power-domains = <&k2g_pds 0x4f>;

};



mmc0: mmc@23000000 {

	compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";

	reg = <0x23000000 0x400>;

	interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;

	dmas = <&edma1 24 0>, <&edma1 25 0>;

	dma-names = "tx", "rx";

	bus-width = <4>;

	ti,needs-special-reset;

	no-1-8-v;

	max-frequency = <96000000>;

	power-domains = <&k2g_pds 0xb>;

	clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;

	clock-names = "fck", "mmchsdb_fck";

	status = "disabled";

};



------------------------------------------------------------------------------

DEPRECATED binding, new DTS files must use the ti,edma3-tpcc/ti,edma3-tptc

binding.