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Commit 4705b2e8 authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt
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sh: add romImage MMCIF boot for sh7724 and Ecovec V2



This patch is V2 of the MMCIF romImage boot support
for sh7724 and the Ecovec board. With this patch
applied and CONFIG_ROMIMAGE_MMCIF selected the
romImage kernel image can be written to a MMC card
and booted directly by the sh7724 cpu.

Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 8a768952
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+11 −0
Original line number Diff line number Diff line
@@ -776,6 +776,17 @@ config ENTRY_OFFSET
	default "0x00010000" if PAGE_SIZE_64KB
	default "0x00000000"

config ROMIMAGE_MMCIF
	bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
	depends on CPU_SUBTYPE_SH7724 && EXPERIMENTAL
	help
	  Say Y here to include experimental MMCIF loading code in
	  romImage. With this enabled it is possible to write the romImage
	  kernel image to an MMC card and boot the kernel straight from
	  the reset vector. At reset the processor Mask ROM will load the
	  first part of the romImage which in turn loads the rest the kernel
	  image to RAM using the MMCIF hardware block.

choice
	prompt "Kernel command line"
	optional
+9 −4
Original line number Diff line number Diff line
#
# linux/arch/sh/boot/romimage/Makefile
#
# create an image suitable for burning to flash from zImage
# create an romImage file suitable for burning to flash/mmc from zImage
#

targets		:= vmlinux head.o zeropage.bin piggy.o
load-y		:= 0

OBJECTS = $(obj)/head.o
LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart \
mmcif-load-$(CONFIG_CPU_SUBTYPE_SH7724)	:= 0xe5200000 # ILRAM
mmcif-obj-$(CONFIG_CPU_SUBTYPE_SH7724)	:= $(obj)/mmcif-sh7724.o
load-$(CONFIG_ROMIMAGE_MMCIF)		:= $(mmcif-load-y)
obj-$(CONFIG_ROMIMAGE_MMCIF)		:= $(mmcif-obj-y)

LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(load-y) -e romstart \
		   -T $(obj)/../../kernel/vmlinux.lds

$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
$(obj)/vmlinux: $(obj)/head.o $(obj-y) $(obj)/piggy.o FORCE
	$(call if_changed,ld)
	@:

+30 −0
Original line number Diff line number Diff line
@@ -12,6 +12,36 @@ romstart:
	/* include board specific setup code */
#include <mach/romimage.h>

#ifdef CONFIG_ROMIMAGE_MMCIF
	/* load the romImage to above the empty zero page */
	mov.l	empty_zero_page_dst, r4
	mov.l	empty_zero_page_dst_adj, r5
	add	r5, r4
	mov.l	bytes_to_load, r5
	mov.l	loader_function, r7
	jsr	@r7
	 mov	r4, r15

	mov.l	empty_zero_page_dst, r4
	mov.l	empty_zero_page_dst_adj, r5
	add	r5, r4
	mov.l	loaded_code_offs, r5
	add	r5, r4
	jmp	@r4
	 nop

	.balign 4
empty_zero_page_dst_adj:
	.long	PAGE_SIZE
bytes_to_load:
	.long	end_data - romstart
loader_function:
	.long	mmcif_loader
loaded_code_offs:
	.long	loaded_code - romstart
loaded_code:
#endif /* CONFIG_ROMIMAGE_MMCIF */

	/* copy the empty_zero_page contents to where vmlinux expects it */
	mova	extra_data_pos, r0
	mov.l	extra_data_size, r1
+72 −0
Original line number Diff line number Diff line
/*
 * sh7724 MMCIF loader
 *
 * Copyright (C) 2010 Magnus Damm
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/mmc/sh_mmcif.h>
#include <mach/romimage.h>

#define MMCIF_BASE      (void __iomem *)0xa4ca0000

#define MSTPCR2		0xa4150038
#define PTWCR		0xa4050146
#define PTXCR		0xa4050148
#define PSELA		0xa405014e
#define PSELE		0xa4050156
#define HIZCRC		0xa405015c
#define DRVCRA		0xa405018a

enum { MMCIF_PROGRESS_ENTER, MMCIF_PROGRESS_INIT,
       MMCIF_PROGRESS_LOAD, MMCIF_PROGRESS_DONE };

/* SH7724 specific MMCIF loader
 *
 * loads the romImage from an MMC card starting from block 512
 * use the following line to write the romImage to an MMC card
 * # dd if=arch/sh/boot/romImage of=/dev/sdx bs=512 seek=512
 */
asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
{
	mmcif_update_progress(MMCIF_PROGRESS_ENTER);

	/* enable clock to the MMCIF hardware block */
	__raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2);

	/* setup pins D7-D0 */
	__raw_writew(0x0000, PTWCR);

	/* setup pins MMC_CLK, MMC_CMD */
	__raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR);

	/* select D3-D0 pin function */
	__raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA);

	/* select D7-D4 pin function */
	__raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE);

	/* disable Hi-Z for the MMC pins */
	__raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC);

	/* high drive capability for MMC pins */
	__raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA);

	mmcif_update_progress(MMCIF_PROGRESS_INIT);

	/* setup MMCIF hardware */
	sh_mmcif_boot_init(MMCIF_BASE);

	mmcif_update_progress(MMCIF_PROGRESS_LOAD);

	/* load kernel via MMCIF interface */
	sh_mmcif_boot_slurp(MMCIF_BASE, buf, no_bytes);

	/* disable clock to the MMCIF hardware block */
	__raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);

	mmcif_update_progress(MMCIF_PROGRESS_DONE);
}
+1 −0
Original line number Diff line number Diff line
@@ -3,5 +3,6 @@ SECTIONS
  .text : {
	zero_page_pos = .;
	*(.data)
	end_data = .;
	}
}
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