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Commit 46981d4c authored by Mukesh Ojha's avatar Mukesh Ojha
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ARM: dts: msm: Add the phandle of crypto core for PIL's on Trinket 



Add the phandle entry of bus master crypto core for PIL's like
(lpass, turing, mss, venus) for Trinket.

Change-Id: I3ecb78c663be2cd403ead9bd3c4f4bad6e56743b
Signed-off-by: default avatarMukesh Ojha <mojha@codeaurora.org>
parent 34e7e997

arch/arm64/boot/dts/qcom/trinket.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -1056,6 +1056,7 @@ 


		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>;

		qcom,mas-crypto = <&mas_crypto_c0>;

		qcom,proxy-reg-names = "vdd_cx";



		qcom,firmware-name = "modem";
@@ -1176,6 +1177,7 @@ 
		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>;

		qcom,mas-crypto = <&mas_crypto_c0>;



		clocks = <&clock_rpmcc CXO_SMD_PIL_LPASS_CLK>;

		clock-names = "xo";
@@ -1215,6 +1217,7 @@ 
		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>;

		qcom,mas-crypto = <&mas_crypto_c0>;



		clocks = <&clock_rpmcc CXO_SMD_PIL_CDSP_CLK>;

		clock-names = "xo";
@@ -2134,6 +2137,7 @@ 


		vdd-supply = <&venus_gdsc>;

		qcom,proxy-reg-names = "vdd";

		qcom,mas-crypto = <&mas_crypto_c0>;



		clocks = <&clock_videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,

			<&clock_videocc VIDEO_CC_VENUS_AHB_CLK>,