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Commit 44fff99f authored Jun 07, 2016 by Mika Kuoppala Committed by Mika Kuoppala Jun 08, 2016

drm/i915/skl: Add WAC6entrylatency



This workaround is for fbc working with rc6 on skylake. Bspec
states that setting this bit needs to be coordinated with uncore
but offers no further details.

v2: rebase

References: HSD#4712857
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-18-git-send-email-mika.kuoppala@intel.com

parent 6fc29133

drivers/gpu/drm/i915/i915_reg.h

+3 −0

Original line number	Original line	Diff line number	Diff line
	@@ -2167,6 +2167,9 @@ enum skl_disp_power_wells {

	#define FBC_LL_SIZE (1536)		#define FBC_LL_SIZE (1536)

			#define FBC_LLC_READ_CTRL _MMIO(0x9044)
			#define FBC_LLC_FULLY_OPEN (1<<30)

	/* Framebuffer compression for GM45+ */		/* Framebuffer compression for GM45+ */
	#define DPFC_CB_BASE _MMIO(0x3200)		#define DPFC_CB_BASE _MMIO(0x3200)
	#define DPFC_CONTROL _MMIO(0x3208)		#define DPFC_CONTROL _MMIO(0x3208)

drivers/gpu/drm/i915/intel_pm.c

+6 −0

Original line number	Original line	Diff line number	Diff line
	@@ -6992,7 +6992,13 @@ static void kabylake_init_clock_gating(struct drm_device *dev)

	static void skylake_init_clock_gating(struct drm_device *dev)		static void skylake_init_clock_gating(struct drm_device *dev)
	{		{
			struct drm_i915_private *dev_priv = dev->dev_private;

	gen9_init_clock_gating(dev);		gen9_init_clock_gating(dev);

			/* WAC6entrylatency:skl */
			I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) \|
			FBC_LLC_FULLY_OPEN);
	}		}

	static void broadwell_init_clock_gating(struct drm_device *dev)		static void broadwell_init_clock_gating(struct drm_device *dev)