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Commit 44b18693 authored by Imre_Deak's avatar Imre_Deak Committed by Russell King
Browse files

[ARM] 4158/1: Fix user page protection macros 



The PAGE_* user page protection macros don't take into account the
configured memory policy and other architecture specific bits like
the global/ASID and shared mapping bits. Instead of constants let
these depend on a variable fixed up at init just like PAGE_KERNEL.

Signed-off-by: default avatarImre Deak <imre.deak@solidboot.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent eeea82ff

arch/arm/mm/mmu.c

+3 −0
Original line number Diff line number Diff line
@@ -49,8 +49,10 @@ pmd_t *top_pmd; 


static unsigned int cachepolicy __initdata = CPOLICY_WRITEBACK;

static unsigned int ecc_mask __initdata = 0;

pgprot_t pgprot_user;

pgprot_t pgprot_kernel;



EXPORT_SYMBOL(pgprot_user);

EXPORT_SYMBOL(pgprot_kernel);



struct cachepolicy {
@@ -345,6 +347,7 @@ static void __init build_mem_type_table(void) 
		mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1);

	}



	pgprot_user   = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot);

	pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG |

				 L_PTE_DIRTY | L_PTE_WRITE |

				 L_PTE_EXEC | kern_pgprot);

include/asm-arm/pgtable.h

+32 −22
Original line number Diff line number Diff line
@@ -175,19 +175,29 @@ extern void __pgd_error(const char *file, int line, unsigned long val); 
#ifndef __ASSEMBLY__



/*

 * The following macros handle the cache and bufferable bits...

 * The pgprot_* and protection_map entries will be fixed up in runtime

 * to include the cachable and bufferable bits based on memory policy,

 * as well as any architecture dependent bits like global/ASID and SMP

 * shared mapping bits.

 */

#define _L_PTE_DEFAULT	L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_CACHEABLE | L_PTE_BUFFERABLE

#define _L_PTE_READ	L_PTE_USER | L_PTE_EXEC



extern pgprot_t		pgprot_user;

extern pgprot_t		pgprot_kernel;



#define PAGE_NONE       __pgprot(_L_PTE_DEFAULT)

#define PAGE_COPY       __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)

#define PAGE_SHARED     __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_WRITE)

#define PAGE_READONLY   __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)

#define PAGE_NONE	pgprot_user

#define PAGE_COPY	__pgprot(pgprot_val(pgprot_user) | _L_PTE_READ)

#define PAGE_SHARED	__pgprot(pgprot_val(pgprot_user) | _L_PTE_READ | \

				 L_PTE_WRITE)

#define PAGE_READONLY	__pgprot(pgprot_val(pgprot_user) | _L_PTE_READ)

#define PAGE_KERNEL	pgprot_kernel



#define __PAGE_NONE	__pgprot(_L_PTE_DEFAULT)

#define __PAGE_COPY	__pgprot(_L_PTE_DEFAULT | _L_PTE_READ)

#define __PAGE_SHARED	__pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_WRITE)

#define __PAGE_READONLY	__pgprot(_L_PTE_DEFAULT | _L_PTE_READ)



#endif /* __ASSEMBLY__ */



/*
@@ -198,23 +208,23 @@ extern pgprot_t pgprot_kernel; 
 *  2) If we could do execute protection, then read is implied

 *  3) write implies read permissions

 */

#define __P000  PAGE_NONE

#define __P001  PAGE_READONLY

#define __P010  PAGE_COPY

#define __P011  PAGE_COPY

#define __P100  PAGE_READONLY

#define __P101  PAGE_READONLY

#define __P110  PAGE_COPY

#define __P111  PAGE_COPY



#define __S000  PAGE_NONE

#define __S001  PAGE_READONLY

#define __S010  PAGE_SHARED

#define __S011  PAGE_SHARED

#define __S100  PAGE_READONLY

#define __S101  PAGE_READONLY

#define __S110  PAGE_SHARED

#define __S111  PAGE_SHARED

#define __P000  __PAGE_NONE

#define __P001  __PAGE_READONLY

#define __P010  __PAGE_COPY

#define __P011  __PAGE_COPY

#define __P100  __PAGE_READONLY

#define __P101  __PAGE_READONLY

#define __P110  __PAGE_COPY

#define __P111  __PAGE_COPY



#define __S000  __PAGE_NONE

#define __S001  __PAGE_READONLY

#define __S010  __PAGE_SHARED

#define __S011  __PAGE_SHARED

#define __S100  __PAGE_READONLY

#define __S101  __PAGE_READONLY

#define __S110  __PAGE_SHARED

#define __S111  __PAGE_SHARED



#ifndef __ASSEMBLY__

/*