Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 446d2733 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'x86/cpu' into x86/core

parents accf0fa6 0a488a53

Documentation/kernel-parameters.txt

+6 −0
Original line number Diff line number Diff line
@@ -1888,6 +1888,12 @@ and is between 256 and 4096 characters. It is defined in the file 
	shapers=	[NET]

			Maximal number of shapers.



	show_msr=	[x86] show boot-time MSR settings

			Format: { <integer> }

			Show boot-time (BIOS-initialized) MSR settings.

			The parameter means the number of CPUs to show,

			for example 1 means boot CPU only.



	sim710=		[SCSI,HW]

			See header of drivers/scsi/sim710.c.

arch/x86/kernel/cpu/Makefile

+2 −2
Original line number Diff line number Diff line
@@ -8,14 +8,14 @@ obj-y += proc.o capflags.o powerflags.o 
obj-$(CONFIG_X86_32)	+= common.o bugs.o cmpxchg.o

obj-$(CONFIG_X86_64)	+= common_64.o bugs_64.o



obj-$(CONFIG_CPU_SUP_INTEL_32)		+= intel.o

obj-$(CONFIG_CPU_SUP_INTEL_64)		+= intel_64.o

obj-$(CONFIG_CPU_SUP_AMD_32)		+= amd.o

obj-$(CONFIG_CPU_SUP_AMD_64)		+= amd_64.o

obj-$(CONFIG_CPU_SUP_CYRIX_32)		+= cyrix.o

obj-$(CONFIG_CPU_SUP_CENTAUR_32)	+= centaur.o

obj-$(CONFIG_CPU_SUP_CENTAUR_64)	+= centaur_64.o

obj-$(CONFIG_CPU_SUP_TRANSMETA_32)	+= transmeta.o

obj-$(CONFIG_CPU_SUP_INTEL_32)		+= intel.o

obj-$(CONFIG_CPU_SUP_INTEL_64)		+= intel_64.o

obj-$(CONFIG_CPU_SUP_UMC_32)		+= umc.o



obj-$(CONFIG_X86_MCE)	+= mcheck/

arch/x86/kernel/cpu/amd.c

+7 −5
Original line number Diff line number Diff line
@@ -31,6 +31,11 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) 
		if (c->x86_power & (1<<8))

			set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);

	}



	/*  Set MTRR capability flag if appropriate */

	if (c->x86_model == 13 || c->x86_model == 9 ||

	   (c->x86_model == 8 && c->x86_mask >= 8))

		set_cpu_cap(c, X86_FEATURE_K6_MTRR);

}



static void __cpuinit init_amd(struct cpuinfo_x86 *c)
@@ -166,10 +171,6 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) 
						mbytes);

				}



				/*  Set MTRR capability flag if appropriate */

				if (c->x86_model == 13 || c->x86_model == 9 ||

				   (c->x86_model == 8 && c->x86_mask >= 8))

					set_cpu_cap(c, X86_FEATURE_K6_MTRR);

				break;

			}
@@ -297,6 +298,7 @@ static struct cpu_dev amd_cpu_dev __cpuinitdata = { 
	.c_early_init   = early_init_amd,

	.c_init		= init_amd,

	.c_size_cache	= amd_size_cache,

	.c_x86_vendor	= X86_VENDOR_AMD,

};



cpu_vendor_dev_register(X86_VENDOR_AMD, &amd_cpu_dev);
 
cpu_dev_register(amd_cpu_dev);

arch/x86/kernel/cpu/amd_64.c

+2 −2
Original line number Diff line number Diff line
@@ -218,7 +218,7 @@ static struct cpu_dev amd_cpu_dev __cpuinitdata = { 
	.c_ident	= { "AuthenticAMD" },

	.c_early_init   = early_init_amd,

	.c_init		= init_amd,

	.c_x86_vendor	= X86_VENDOR_AMD,

};



cpu_vendor_dev_register(X86_VENDOR_AMD, &amd_cpu_dev);

cpu_dev_register(amd_cpu_dev);

arch/x86/kernel/cpu/centaur.c

+13 −1
Original line number Diff line number Diff line
@@ -314,6 +314,16 @@ enum { 
		EAMD3D		= 1<<20,

};



static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)

{

	switch (c->x86) {

	case 5:

		/* Emulate MTRRs using Centaur's MCR. */

		set_cpu_cap(c, X86_FEATURE_CENTAUR_MCR);

		break;

	}

}



static void __cpuinit init_centaur(struct cpuinfo_x86 *c)

{
@@ -462,8 +472,10 @@ centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size) 
static struct cpu_dev centaur_cpu_dev __cpuinitdata = {

	.c_vendor	= "Centaur",

	.c_ident	= { "CentaurHauls" },

	.c_early_init	= early_init_centaur,

	.c_init		= init_centaur,

	.c_size_cache	= centaur_size_cache,

	.c_x86_vendor	= X86_VENDOR_CENTAUR,

};



cpu_vendor_dev_register(X86_VENDOR_CENTAUR, &centaur_cpu_dev);
 
cpu_dev_register(centaur_cpu_dev);