Commit 42b53a13 authored Apr 06, 2018 by Nicholas Piggin Committed by Greg Kroah-Hartman Apr 19, 2018

KVM: PPC: Book3S HV: trace_tlbie must not be called in realmode



commit 19ce7909ed11c49f7eddf59e7f49cd3062bf83d5 upstream.

This crashes with a "Bad real address for load" attempting to load
from the vmalloc region in realmode (faulting address is in DAR).

  Oops: Bad interrupt in KVM entry/exit code, sig: 6 [#1]
  LE SMP NR_CPUS=2048 NUMA PowerNV
  CPU: 53 PID: 6582 Comm: qemu-system-ppc Not tainted 4.16.0-01530-g43d1859f0994
  NIP:  c0000000000155ac LR: c0000000000c2430 CTR: c000000000015580
  REGS: c000000fff76dd80 TRAP: 0200   Not tainted  (4.16.0-01530-g43d1859f0994)
  MSR:  9000000000201003 <SF,HV,ME,RI,LE>  CR: 48082222  XER: 00000000
  CFAR: 0000000102900ef0 DAR: d00017fffd941a28 DSISR: 00000040 SOFTE: 3
  NIP [c0000000000155ac] perf_trace_tlbie+0x2c/0x1a0
  LR [c0000000000c2430] do_tlbies+0x230/0x2f0

I suspect the reason is the per-cpu data is not in the linear chunk.
This could be restored if that was able to be fixed, but for now,
just remove the tracepoints.

Fixes: 0428491c ("powerpc/mm: Trace tlbie(l) instructions")
Cc: stable@vger.kernel.org # v4.13+
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent 5661d43b

arch/powerpc/kvm/book3s_hv_rm_mmu.c

+0 −4

Original line number	Diff line number	Diff line
		@@ -447,8 +447,6 @@ static void do_tlbies(struct kvm kvm, unsigned long rbvalues,
		for (i = 0; i < npages; ++i) {
		asm volatile(PPC_TLBIE_5(%0,%1,0,0,0) : :
		"r" (rbvalues[i]), "r" (kvm->arch.lpid));
		trace_tlbie(kvm->arch.lpid, 0, rbvalues[i],
		kvm->arch.lpid, 0, 0, 0);
		}
		asm volatile("eieio; tlbsync; ptesync" : : : "memory");
		kvm->arch.tlbie_lock = 0;
		@@ -458,8 +456,6 @@ static void do_tlbies(struct kvm kvm, unsigned long rbvalues,
		for (i = 0; i < npages; ++i) {
		asm volatile(PPC_TLBIEL(%0,%1,0,0,0) : :
		"r" (rbvalues[i]), "r" (0));
		trace_tlbie(kvm->arch.lpid, 1, rbvalues[i],
		0, 0, 0, 0);
		}
		asm volatile("ptesync" : : : "memory");
		}