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Commit 423fb0d5 authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle
Browse files

MIPS: Move r2300 FP code from r2300_switch.S to r2300_fpu.S 



Move _save_fp(), _restore_fp() & _init_fpu() out of r2300_switch.S &
into r2300_fpu.S. This logically places all FP-related asm code into
r2300_fpu.S & provides consistency with R4K after the preceding commit.

Besides cleaning up this will be useful for later patches which disable
FP support.

[ralf@linux-mips.org: Fixed build issues reported by Arnd Bergmann
<arnd@arndb.de>]

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16238/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent a2aea699

arch/mips/kernel/r2300_fpu.S

+79 −1
Original line number Diff line number Diff line
@@ -12,7 +12,9 @@ 
 * Copyright (c) 1998 Harald Koerfgen

 */

#include <asm/asm.h>

#include <asm/asmmacro.h>

#include <asm/errno.h>

#include <asm/export.h>

#include <asm/fpregdef.h>

#include <asm/mipsregs.h>

#include <asm/asm-offsets.h>
@@ -31,9 +33,85 @@ 
	PTR	9b+4,bad_stack;					\

	.previous



	.set	noreorder

	.set	mips1



/*

 * Save a thread's fp context.

 */

LEAF(_save_fp)

EXPORT_SYMBOL(_save_fp)

	fpu_save_single a0, t1			# clobbers t1

	jr	ra

	END(_save_fp)



/*

 * Restore a thread's fp context.

 */

LEAF(_restore_fp)

	fpu_restore_single a0, t1		# clobbers t1

	jr	ra

	END(_restore_fp)



/*

 * Load the FPU with signalling NANS.  This bit pattern we're using has

 * the property that no matter whether considered as single or as double

 * precision represents signaling NANS.

 *

 * The value to initialize fcr31 to comes in $a0.

 */



	.set push

	SET_HARDFLOAT



LEAF(_init_fpu)

	mfc0	t0, CP0_STATUS

	li	t1, ST0_CU1

	or	t0, t1

	mtc0	t0, CP0_STATUS



	ctc1	a0, fcr31



	li	t0, -1



	mtc1	t0, $f0

	mtc1	t0, $f1

	mtc1	t0, $f2

	mtc1	t0, $f3

	mtc1	t0, $f4

	mtc1	t0, $f5

	mtc1	t0, $f6

	mtc1	t0, $f7

	mtc1	t0, $f8

	mtc1	t0, $f9

	mtc1	t0, $f10

	mtc1	t0, $f11

	mtc1	t0, $f12

	mtc1	t0, $f13

	mtc1	t0, $f14

	mtc1	t0, $f15

	mtc1	t0, $f16

	mtc1	t0, $f17

	mtc1	t0, $f18

	mtc1	t0, $f19

	mtc1	t0, $f20

	mtc1	t0, $f21

	mtc1	t0, $f22

	mtc1	t0, $f23

	mtc1	t0, $f24

	mtc1	t0, $f25

	mtc1	t0, $f26

	mtc1	t0, $f27

	mtc1	t0, $f28

	mtc1	t0, $f29

	mtc1	t0, $f30

	mtc1	t0, $f31

	jr	ra

	END(_init_fpu)



	.set pop



	.set	noreorder



/**

 * _save_fp_context() - save FP context from the FPU

 * @a0 - pointer to fpregs field of sigcontext

arch/mips/kernel/r2300_switch.S

+0 −75
Original line number Diff line number Diff line
@@ -68,78 +68,3 @@ LEAF(resume) 
	move	v0, a0

	jr	ra

	END(resume)
 


/*

 * Save a thread's fp context.

 */

LEAF(_save_fp)

EXPORT_SYMBOL(_save_fp)

	fpu_save_single a0, t1			# clobbers t1

	jr	ra

	END(_save_fp)



/*

 * Restore a thread's fp context.

 */

LEAF(_restore_fp)

	fpu_restore_single a0, t1		# clobbers t1

	jr	ra

	END(_restore_fp)



/*

 * Load the FPU with signalling NANS.  This bit pattern we're using has

 * the property that no matter whether considered as single or as double

 * precision represents signaling NANS.

 *

 * The value to initialize fcr31 to comes in $a0.

 */



	.set push

	SET_HARDFLOAT



LEAF(_init_fpu)

	mfc0	t0, CP0_STATUS

	li	t1, ST0_CU1

	or	t0, t1

	mtc0	t0, CP0_STATUS



	ctc1	a0, fcr31



	li	t0, -1



	mtc1	t0, $f0

	mtc1	t0, $f1

	mtc1	t0, $f2

	mtc1	t0, $f3

	mtc1	t0, $f4

	mtc1	t0, $f5

	mtc1	t0, $f6

	mtc1	t0, $f7

	mtc1	t0, $f8

	mtc1	t0, $f9

	mtc1	t0, $f10

	mtc1	t0, $f11

	mtc1	t0, $f12

	mtc1	t0, $f13

	mtc1	t0, $f14

	mtc1	t0, $f15

	mtc1	t0, $f16

	mtc1	t0, $f17

	mtc1	t0, $f18

	mtc1	t0, $f19

	mtc1	t0, $f20

	mtc1	t0, $f21

	mtc1	t0, $f22

	mtc1	t0, $f23

	mtc1	t0, $f24

	mtc1	t0, $f25

	mtc1	t0, $f26

	mtc1	t0, $f27

	mtc1	t0, $f28

	mtc1	t0, $f29

	mtc1	t0, $f30

	mtc1	t0, $f31

	jr	ra

	END(_init_fpu)



	.set pop