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Commit 421d8c3b authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "drm/msm/sde: Enable ubwc 1.0 for supported targets"

parents e1e353c7 2e21c02a

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+2 −1
Original line number Diff line number Diff line
@@ -103,7 +103,8 @@ enum { 
	SDE_HW_UBWC_VER_20 = SDE_HW_UBWC_VER(0x200),

	SDE_HW_UBWC_VER_30 = SDE_HW_UBWC_VER(0x300),

};



#define IS_UBWC_10_SUPPORTED(rev) \

		IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_UBWC_VER_10)

#define IS_UBWC_20_SUPPORTED(rev) \

		IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_UBWC_VER_20)

#define IS_UBWC_30_SUPPORTED(rev) \

drivers/gpu/drm/msm/sde/sde_hw_sspp.c

+7 −2
Original line number Diff line number Diff line 
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -361,7 +361,12 @@ static void sde_hw_sspp_setup_format(struct sde_hw_pipe *ctx, 
		SDE_REG_WRITE(c, SSPP_FETCH_CONFIG,

			SDE_FETCH_CONFIG_RESET_VALUE |

			ctx->mdp->highest_bank_bit << 18);

		if (IS_UBWC_20_SUPPORTED(ctx->catalog->ubwc_version)) {

		if (IS_UBWC_10_SUPPORTED(ctx->catalog->ubwc_version)) {

			alpha_en_mask = const_alpha_en ? BIT(31) : 0;

			SDE_REG_WRITE(c, SSPP_UBWC_STATIC_CTRL,

				alpha_en_mask | (ctx->mdp->ubwc_swizzle & 0x1) |

				BIT(8) | (ctx->mdp->highest_bank_bit << 4));

		} else if (IS_UBWC_20_SUPPORTED(ctx->catalog->ubwc_version)) {

			alpha_en_mask = const_alpha_en ? BIT(31) : 0;

			SDE_REG_WRITE(c, SSPP_UBWC_STATIC_CTRL,

				alpha_en_mask | (ctx->mdp->ubwc_swizzle) |

drivers/gpu/drm/msm/sde/sde_hw_top.c

+3 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -398,6 +398,8 @@ void sde_hw_reset_ubwc(struct sde_hw_mdp *mdp, struct sde_mdss_cfg *m) 


		if (IS_UBWC_30_SUPPORTED(m->ubwc_version))

			reg |= BIT(10);

		if (IS_UBWC_10_SUPPORTED(m->ubwc_version))

			reg |= BIT(8);



		SDE_REG_WRITE(&c, UBWC_STATIC, reg);

	} else {

drivers/gpu/drm/msm/sde/sde_hw_wb.c

+6 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -169,6 +169,11 @@ static void sde_hw_wb_setup_format(struct sde_hw_wb *ctx, 
			SDE_REG_WRITE(c, WB_UBWC_STATIC_CTRL,

					(ctx->mdp->ubwc_swizzle << 0) |

					(ctx->mdp->highest_bank_bit << 4));

		if (IS_UBWC_10_SUPPORTED(ctx->catalog->ubwc_version))

			SDE_REG_WRITE(c, WB_UBWC_STATIC_CTRL,

					(ctx->mdp->ubwc_swizzle << 0) |

					BIT(8) |

					(ctx->mdp->highest_bank_bit << 4));

	}



	if (data->is_secure)