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Commit 4171424e authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: fix typo in read_disabled vbios code 



BUS_CNTL reg and bits moved between pre-PCIE and PCIE asics.

Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent e22e6d20

drivers/gpu/drm/radeon/radeon_bios.c

+15 −6
Original line number Diff line number Diff line
@@ -331,7 +331,7 @@ static bool avivo_read_disabled_bios(struct radeon_device *rdev) 


	seprom_cntl1 = RREG32(RADEON_SEPROM_CNTL1);

	viph_control = RREG32(RADEON_VIPH_CONTROL);

	bus_cntl = RREG32(RADEON_BUS_CNTL);

	bus_cntl = RREG32(RV370_BUS_CNTL);

	d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);

	d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);

	vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
@@ -350,7 +350,7 @@ static bool avivo_read_disabled_bios(struct radeon_device *rdev) 
	WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));



	/* enable the rom */

	WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));

	WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM));



	/* Disable VGA mode */

	WREG32(AVIVO_D1VGA_CONTROL,
@@ -367,7 +367,7 @@ static bool avivo_read_disabled_bios(struct radeon_device *rdev) 
	/* restore regs */

	WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1);

	WREG32(RADEON_VIPH_CONTROL, viph_control);

	WREG32(RADEON_BUS_CNTL, bus_cntl);

	WREG32(RV370_BUS_CNTL, bus_cntl);

	WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);

	WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);

	WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
@@ -390,6 +390,9 @@ static bool legacy_read_disabled_bios(struct radeon_device *rdev) 


	seprom_cntl1 = RREG32(RADEON_SEPROM_CNTL1);

	viph_control = RREG32(RADEON_VIPH_CONTROL);

	if (rdev->flags & RADEON_IS_PCIE)

		bus_cntl = RREG32(RV370_BUS_CNTL);

	else

		bus_cntl = RREG32(RADEON_BUS_CNTL);

	crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL);

	crtc2_gen_cntl = 0;
@@ -412,6 +415,9 @@ static bool legacy_read_disabled_bios(struct radeon_device *rdev) 
	WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));



	/* enable the rom */

	if (rdev->flags & RADEON_IS_PCIE)

		WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM));

	else

		WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));



	/* Turn off mem requests and CRTC for both controllers */
@@ -439,6 +445,9 @@ static bool legacy_read_disabled_bios(struct radeon_device *rdev) 
	/* restore regs */

	WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1);

	WREG32(RADEON_VIPH_CONTROL, viph_control);

	if (rdev->flags & RADEON_IS_PCIE)

		WREG32(RV370_BUS_CNTL, bus_cntl);

	else

		WREG32(RADEON_BUS_CNTL, bus_cntl);

	WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl);

	if (!(rdev->flags & RADEON_SINGLE_CRTC)) {

drivers/gpu/drm/radeon/radeon_reg.h

+2 −0
Original line number Diff line number Diff line
@@ -300,6 +300,8 @@ 
#       define RADEON_BUS_READ_BURST         (1 << 30)

#define RADEON_BUS_CNTL1                    0x0034

#       define RADEON_BUS_WAIT_ON_LOCK_EN    (1 << 4)

#define RV370_BUS_CNTL                      0x004c

#       define RV370_BUS_BIOS_DIS_ROM        (1 << 2)

/* rv370/rv380, rv410, r423/r430/r480, r5xx */

#define RADEON_MSI_REARM_EN		    0x0160

#	define RV370_MSI_REARM_EN	     (1 << 0)