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Commit 4138cc34 authored by Siddha, Suresh B's avatar Siddha, Suresh B Committed by Ingo Molnar
Browse files

x86: set strong uncacheable where UC is really desired 



Also use _PAGE_PWT for all the mappings which need uncache mapping.
Instead of existing PAT2 which is UC- (and can be overwritten by MTRRs),
we now use PAT3 which is strong uncacheable.

This makes it consistent with pgprot_noncached()

Signed-off-by: default avatarSuresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent fbd3bfd8

arch/x86/mm/ioremap_32.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -119,7 +119,7 @@ EXPORT_SYMBOL(__ioremap); 
void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)

void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)

{

{

	unsigned long last_addr;

	unsigned long last_addr;

	void __iomem *p = __ioremap(phys_addr, size, _PAGE_PCD);

	void __iomem *p = __ioremap(phys_addr, size, _PAGE_PCD | _PAGE_PWT);

	if (!p) 

	if (!p) 

		return p; 

		return p;

arch/x86/mm/ioremap_64.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -138,7 +138,7 @@ EXPORT_SYMBOL(__ioremap); 




void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)

void __iomem *ioremap_nocache (unsigned long phys_addr, unsigned long size)

{

{

	return __ioremap(phys_addr, size, _PAGE_PCD);

	return __ioremap(phys_addr, size, _PAGE_PCD | _PAGE_PWT);

}

}

EXPORT_SYMBOL(ioremap_nocache);

EXPORT_SYMBOL(ioremap_nocache);