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Commit 40b13ca8 authored by Victor Kamensky's avatar Victor Kamensky Committed by Wolfram Sang
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i2c: omap: raw read and write endian fix 



All OMAP IP blocks expect LE data, but CPU may operate in BE mode.
Need to use endian neutral functions to read/write h/w registers.
I.e instead of __raw_read[lw] and __raw_write[lw] functions code
need to use read[lw]_relaxed and write[lw]_relaxed functions.
If the first simply reads/writes register, the second will byteswap
it if host operates in BE mode.

Changes are trivial sed like replacement of __raw_xxx functions
with xxx_relaxed variant.

Signed-off-by: default avatarVictor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: default avatarTaras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent c2a3a619

drivers/i2c/busses/i2c-omap.c

+4 −4
Original line number Diff line number Diff line
@@ -266,13 +266,13 @@ static const u8 reg_map_ip_v2[] = { 
static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,

				      int reg, u16 val)

{

	__raw_writew(val, i2c_dev->base +

	writew_relaxed(val, i2c_dev->base +

			(i2c_dev->regs[reg] << i2c_dev->reg_shift));

}



static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)

{

	return __raw_readw(i2c_dev->base +

	return readw_relaxed(i2c_dev->base +

				(i2c_dev->regs[reg] << i2c_dev->reg_shift));

}
@@ -1140,9 +1140,9 @@ omap_i2c_probe(struct platform_device *pdev) 
	 * Read the Rev hi bit-[15:14] ie scheme this is 1 indicates ver2.

	 * On omap1/3/2 Offset 4 is IE Reg the bit [15:14] is 0 at reset.

	 * Also since the omap_i2c_read_reg uses reg_map_ip_* a

	 * raw_readw is done.

	 * readw_relaxed is done.

	 */

	rev = __raw_readw(dev->base + 0x04);

	rev = readw_relaxed(dev->base + 0x04);



	dev->scheme = OMAP_I2C_SCHEME(rev);

	switch (dev->scheme) {