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Commit 3e2990bb authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: add support for cx gdsc operation mode"

parents bc8bd9af 51035bcc

drivers/gpu/msm/adreno.c

+1 −0
Original line number Diff line number Diff line
@@ -756,6 +756,7 @@ static struct { 
	{ ADRENO_QUIRK_LIMIT_UCHE_GBIF_RW,

			"qcom,gpu-quirk-limit-uche-gbif-rw" },

	{ ADRENO_QUIRK_MMU_SECURE_CB_ALT, "qcom,gpu-quirk-mmu-secure-cb-alt" },

	{ ADRENO_QUIRK_CX_GDSC, "qcom,gpu-quirk-cx-gdsc" },

};



static struct device_node *

drivers/gpu/msm/adreno.h

+2 −0
Original line number Diff line number Diff line
@@ -157,6 +157,8 @@ 
#define ADRENO_QUIRK_LIMIT_UCHE_GBIF_RW BIT(8)

/* Select alternate secure context bank for mmu */

#define ADRENO_QUIRK_MMU_SECURE_CB_ALT BIT(9)

/* Do explicit mode control of cx gdsc */

#define ADRENO_QUIRK_CX_GDSC BIT(10)



/* Flags to control command packet settings */

#define KGSL_CMD_FLAGS_NONE             0

drivers/gpu/msm/kgsl_gmu.c

+8 −0
Original line number Diff line number Diff line
@@ -1520,7 +1520,15 @@ static int gmu_suspend(struct kgsl_device *device) 
		return -EINVAL;



	gmu_disable_clks(device);



	if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_CX_GDSC))

		regulator_set_mode(gmu->cx_gdsc, REGULATOR_MODE_IDLE);



	gmu_disable_gdsc(gmu);



	if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_CX_GDSC))

		regulator_set_mode(gmu->cx_gdsc, REGULATOR_MODE_NORMAL);



	dev_err(&gmu->pdev->dev, "Suspended GMU\n");

	return 0;

}