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Commit 3de64bf1 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
Browse files

clk: sunxi-ng: Support separately grouped PLL lock status register 



On the Allwinner A80 SoC, the PLL lock status indicators are grouped
together in a separate register, as opposed to being scattered in each
PLL's configuration register.

Add a flag to support this.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent 82aab516

drivers/clk/sunxi-ng/ccu_common.c

+7 −2
Original line number Diff line number Diff line
@@ -25,13 +25,18 @@ static DEFINE_SPINLOCK(ccu_lock); 


void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock)

{

	void __iomem *addr;

	u32 reg;



	if (!lock)

		return;



	WARN_ON(readl_relaxed_poll_timeout(common->base + common->reg, reg,

					   reg & lock, 100, 70000));

	if (common->features & CCU_FEATURE_LOCK_REG)

		addr = common->base + common->lock_reg;

	else

		addr = common->base + common->reg;



	WARN_ON(readl_relaxed_poll_timeout(addr, reg, reg & lock, 100, 70000));

}



int sunxi_ccu_probe(struct device_node *node, void __iomem *reg,

drivers/clk/sunxi-ng/ccu_common.h

+2 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#define CCU_FEATURE_FIXED_PREDIV	BIT(2)

#define CCU_FEATURE_FIXED_POSTDIV	BIT(3)

#define CCU_FEATURE_ALL_PREDIV		BIT(4)

#define CCU_FEATURE_LOCK_REG		BIT(5)



struct device_node;
@@ -57,6 +58,7 @@ struct device_node; 
struct ccu_common {

	void __iomem	*base;

	u16		reg;

	u16		lock_reg;

	u32		prediv;



	unsigned long	features;