Commit 3dc3401c authored Oct 07, 2012 by Jon Hunter Committed by Paul Walmsley Oct 07, 2012

ARM: OMAP2+: hwmod data: Fix PMU interrupt definitions



Commit 7d7e1eba (ARM: OMAP2+: Prepare for irqs.h removal) and commit ec2c0825
(ARM: OMAP2+: Remove hardcoded IRQs and enable SPARSE_IRQ) updated the way
interrupts for OMAP2/3 devices are defined in the HWMOD data structures to
being an index plus a fixed offset (defined by OMAP_INTC_START). The definition
of the PMU interrupts on OMAP2/3 devices is missing the OMAP_INTC_START offset
and so this is causing the allocation of PMU interrupts to fail on OMAP2/3
devices. So add the offset to fix this.

This is patch is based upon Tony's master branch for OMAP.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

parent 2efd5439

arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -219,7 +219,7 @@ struct omap_hwmod omap2xxx_l4_wkup_hwmod = {

		/* MPU */
		static struct omap_hwmod_irq_info omap2xxx_mpu_irqs[] = {
		{ .name = "pmu", .irq = 3 },
		{ .name = "pmu", .irq = 3 + OMAP_INTC_START },
		{ .irq = -1 }
		};

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -94,7 +94,7 @@ static struct omap_hwmod omap3xxx_l4_sec_hwmod = {

		/* MPU */
		static struct omap_hwmod_irq_info omap3xxx_mpu_irqs[] = {
		{ .name = "pmu", .irq = 3 },
		{ .name = "pmu", .irq = 3 + OMAP_INTC_START },
		{ .irq = -1 }
		};