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Commit 3d4f8605 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Vinod Koul
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dw_dmac: fix a regression in dwc_prep_dma_memcpy 



Sometimes memory-to-memory test is failed, that's why we need to choose minimum
data portion between source and destination limits together.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@linux.intel.com>
parent fed2574b

drivers/dma/dw_dmac.c

+5 −4
Original line number Diff line number Diff line
@@ -716,6 +716,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, 
	size_t			offset;

	unsigned int		src_width;

	unsigned int		dst_width;

	unsigned int		data_width;

	u32			ctllo;



	dev_vdbg(chan2dev(chan),
@@ -728,11 +729,11 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, 
		return NULL;

	}



	src_width = min_t(unsigned int, dwc->dw->data_width[dwc_get_sms(dws)],

			  dwc_fast_fls(src | len));

	data_width = min_t(unsigned int, dwc->dw->data_width[dwc_get_sms(dws)],

					 dwc->dw->data_width[dwc_get_dms(dws)]);



	dst_width = min_t(unsigned int, dwc->dw->data_width[dwc_get_dms(dws)],

			  dwc_fast_fls(dest | len));

	src_width = dst_width = min_t(unsigned int, data_width,

				      dwc_fast_fls(src | dest | len));



	ctllo = DWC_DEFAULT_CTLLO(chan)

			| DWC_CTLL_DST_WIDTH(dst_width)