Loading soc/swr-wcd-ctrl.c +4 −4 Original line number Diff line number Diff line Loading @@ -655,6 +655,10 @@ static u8 get_inactive_bank_num(struct swr_mstr_ctrl *swrm) static void enable_bank_switch(struct swr_mstr_ctrl *swrm, u8 bank, u8 row, u8 col) { /* apply div2 setting for inactive bank before bank switch */ swrm_cmd_fifo_wr_cmd(swrm, 0x01, 0xF, 0x00, SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(bank)); swrm_cmd_fifo_wr_cmd(swrm, ((row << 3) | col), 0xF, 0xF, SWRS_SCP_FRAME_CTRL_BANK(bank)); } Loading Loading @@ -893,10 +897,6 @@ static void swrm_apply_port_config(struct swr_master *master) dev_dbg(swrm->dev, "%s: enter bank: %d master_ports: %d\n", __func__, bank, master->num_port); swrm_cmd_fifo_wr_cmd(swrm, 0x01, 0xF, 0x00, SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(bank)); swrm_copy_data_port_config(master, bank); } Loading Loading
soc/swr-wcd-ctrl.c +4 −4 Original line number Diff line number Diff line Loading @@ -655,6 +655,10 @@ static u8 get_inactive_bank_num(struct swr_mstr_ctrl *swrm) static void enable_bank_switch(struct swr_mstr_ctrl *swrm, u8 bank, u8 row, u8 col) { /* apply div2 setting for inactive bank before bank switch */ swrm_cmd_fifo_wr_cmd(swrm, 0x01, 0xF, 0x00, SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(bank)); swrm_cmd_fifo_wr_cmd(swrm, ((row << 3) | col), 0xF, 0xF, SWRS_SCP_FRAME_CTRL_BANK(bank)); } Loading Loading @@ -893,10 +897,6 @@ static void swrm_apply_port_config(struct swr_master *master) dev_dbg(swrm->dev, "%s: enter bank: %d master_ports: %d\n", __func__, bank, master->num_port); swrm_cmd_fifo_wr_cmd(swrm, 0x01, 0xF, 0x00, SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(bank)); swrm_copy_data_port_config(master, bank); } Loading