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Commit 3b55ddad authored by Flora Cui's avatar Flora Cui Committed by Alex Deucher
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drm/amdgpu/gfx8: Enable interrupt on ME1_PIPE3 



Otherwise FW cannot see the RLC ACK for the memory clean request
It's for Stoney.

Signed-off-by: default avatarFlora Cui <Flora.Cui@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarJammy Zhou <Jammy.Zhou@amd.com>
parent 9c4153b1

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+5 −0
Original line number Diff line number Diff line
@@ -3756,6 +3756,11 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) 
		tmp = REG_SET_FIELD(tmp, CP_HQD_PERSISTENT_STATE, PRELOAD_SIZE, 0x53);

		WREG32(mmCP_HQD_PERSISTENT_STATE, tmp);

		mqd->cp_hqd_persistent_state = tmp;

		if (adev->asic_type == CHIP_STONEY) {

			tmp = RREG32(mmCP_ME1_PIPE3_INT_CNTL);

			tmp = REG_SET_FIELD(tmp, CP_ME1_PIPE3_INT_CNTL, GENERIC2_INT_ENABLE, 1);

			WREG32(mmCP_ME1_PIPE3_INT_CNTL, tmp);

		}



		/* activate the queue */

		mqd->cp_hqd_active = 1;