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Commit 3a6f08a3 authored by Gregory CLEMENT's avatar Gregory CLEMENT Committed by Arnd Bergmann
Browse files

arm: mvebu: Add support for local interrupt 



MPIC allows the use of private interrupt for each CPUs. The 28th first
interrupts are per-cpu. This patch adds support to use them.

Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 9b75ac0c

arch/arm/mach-mvebu/irq-armada-370-xp.c

+11 −4
Original line number Diff line number Diff line
@@ -145,10 +145,17 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, 
{

	armada_370_xp_irq_mask(irq_get_irq_data(virq));

	writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);

	irq_set_status_flags(virq, IRQ_LEVEL);



	if (hw < ARMADA_370_XP_MAX_PER_CPU_IRQS) {

		irq_set_percpu_devid(virq);

		irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,

					handle_percpu_devid_irq);



	} else {

		irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,

					handle_level_irq);

	irq_set_status_flags(virq, IRQ_LEVEL);

	}

	set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);



	return 0;
@@ -245,7 +252,7 @@ asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs 
		if (irqnr > 1022)

			break;



		if (irqnr >= 8) {

		if (irqnr > 0) {

			irqnr =	irq_find_mapping(armada_370_xp_mpic_domain,

					irqnr);

			handle_IRQ(irqnr, regs);