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Commit 3a3dc316 authored by Narender Ankam's avatar Narender Ankam
Browse files

ARM: dts: msm: add dsi pll device node on qcs405 



Add MDSS DSI 28LPM PLL device node on qcs405 target.

Change-Id: Icaa5698a2e0d14c5933b153e611fd50526987dcf
Signed-off-by: default avatarNarender Ankam <nankam@codeaurora.org>
parent 594a477d

arch/arm64/boot/dts/qcom/qcs405-mdss-pll.dtsi

0 → 100644
+86 −0
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/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&soc {

	mdss_dsi0_pll: qcom,mdss_dsi_pll@1a94a00 {

		compatible = "qcom,mdss_dsi_pll_28lpm";

		label = "MDSS DSI 0 PLL";

		cell-index = <0>;

		#clock-cells = <1>;



		reg = <0x01a94a00 0xd4>,

			<0x0184d074 0x8>;

		reg-names = "pll_base", "gdsc_base";



		clocks = <&clock_gcc GCC_MDSS_AHB_CLK>;

		clock-names = "iface_clk";

		clock-rate = <0>;



		gdsc-supply = <&gdsc_mdss>;



		qcom,dsi-pll-ssc-en;

		qcom,dsi-pll-ssc-mode = "down-spread";

		qcom,ssc-frequency-hz = <30000>;

		qcom,ssc-ppm = <5000>;



		qcom,platform-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,platform-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "gdsc";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};

		};

	};



	mdss_dsi1_pll: qcom,mdss_dsi_pll@1a96a00 {

		status="disabled";

		compatible = "qcom,mdss_dsi_pll_28lpm";

		label = "MDSS DSI 1 PLL";

		cell-index = <1>;

		#clock-cells = <1>;



		reg = <0x01a96a00 0xd4>,

			<0x0184d074 0x8>;

		reg-names = "pll_base", "gdsc_base";



		clocks = <&clock_gcc GCC_MDSS_AHB_CLK>;

		clock-names = "iface_clk";

		clock-rate = <0>;



		gdsc-supply = <&gdsc_mdss>;



		qcom,dsi-pll-ssc-en;

		qcom,dsi-pll-ssc-mode = "down-spread";

		qcom,ssc-frequency-hz = <30000>;

		qcom,ssc-ppm = <5000>;



		qcom,platform-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,platform-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "gdsc";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};

		};

	};

};

arch/arm64/boot/dts/qcom/qcs405.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -119,6 +119,7 @@ 
#include "qcs405-pm.dtsi"

#include "msm-arm-smmu-qcs405.dtsi"

#include "qcs405-gpu.dtsi"

#include "qcs405-mdss-pll.dtsi"



&soc {

	#address-cells = <1>;