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Commit 39ac6ea0 authored by Deepak Kumar's avatar Deepak Kumar
Browse files

msm: kgsl: Add support for A616 GPU 



Add new GPU ID and required initial settings
to support graphics functionality on SDM710.

Change-Id: I9c553b8f27ba3ee68e5708a8826ac62f2d1f70ed
Signed-off-by: default avatarDeepak Kumar <dkumar@codeaurora.org>
parent b49748ed

drivers/gpu/msm/adreno-gpulist.h

+18 −0
Original line number Diff line number Diff line
@@ -456,4 +456,22 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.num_protected_regs = 0x20,

		.busy_mask = 0xFFFFFFFE,

	},

	{

		.gpurev = ADRENO_REV_A616,

		.core = 6,

		.major = 1,

		.minor = 6,

		.patchid = ANY_ID,

		.features = ADRENO_64BIT | ADRENO_RPMH | ADRENO_PREEMPTION |

			ADRENO_GPMU | ADRENO_CONTENT_PROTECTION | ADRENO_IFPC,

		.sqefw_name = "a630_sqe.fw",

		.zap_name = "a615_zap",

		.gpudev = &adreno_a6xx_gpudev,

		.gmem_size = SZ_512K,

		.num_protected_regs = 0x20,

		.busy_mask = 0xFFFFFFFE,

		.gpmufw_name = "a630_gmu.bin",

		.gpmu_major = 0x1,

		.gpmu_minor = 0x003,

	},

};

drivers/gpu/msm/adreno.h

+4 −1
Original line number Diff line number Diff line
@@ -219,6 +219,7 @@ enum adreno_gpurev { 
	ADRENO_REV_A540 = 540,

	ADRENO_REV_A608 = 608,

	ADRENO_REV_A615 = 615,

	ADRENO_REV_A616 = 616,

	ADRENO_REV_A630 = 630,

	ADRENO_REV_A640 = 640,

	ADRENO_REV_A680 = 680,
@@ -1284,6 +1285,7 @@ static inline int adreno_is_a6xx(struct adreno_device *adreno_dev) 


ADRENO_TARGET(a608, ADRENO_REV_A608)

ADRENO_TARGET(a615, ADRENO_REV_A615)

ADRENO_TARGET(a616, ADRENO_REV_A616)

ADRENO_TARGET(a630, ADRENO_REV_A630)

ADRENO_TARGET(a640, ADRENO_REV_A640)

ADRENO_TARGET(a680, ADRENO_REV_A680)
@@ -1928,7 +1930,8 @@ static inline void adreno_perfcntr_active_oob_put( 


static inline bool adreno_has_sptprac_gdsc(struct adreno_device *adreno_dev)

{

	if (adreno_is_a615(adreno_dev) || adreno_is_a630(adreno_dev))

	if (adreno_is_a615(adreno_dev) || adreno_is_a630(adreno_dev) ||

		adreno_is_a616(adreno_dev))

		return true;

	else

		return false;

drivers/gpu/msm/adreno_a6xx.c

+8 −4
Original line number Diff line number Diff line
@@ -70,6 +70,7 @@ static const struct adreno_vbif_platform a6xx_vbif_platforms[] = { 
	{ adreno_is_a640, a640_gbif },

	{ adreno_is_a680, a640_gbif },

	{ adreno_is_a608, a615_gbif },

	{ adreno_is_a616, a615_gbif },

};



struct kgsl_hwcg_reg {
@@ -364,6 +365,7 @@ static const struct { 
	{adreno_is_a640, a640_hwcg_regs, ARRAY_SIZE(a640_hwcg_regs)},

	{adreno_is_a680, a640_hwcg_regs, ARRAY_SIZE(a640_hwcg_regs)},

	{adreno_is_a608, a608_hwcg_regs, ARRAY_SIZE(a608_hwcg_regs)},

	{adreno_is_a616, a615_hwcg_regs, ARRAY_SIZE(a615_hwcg_regs)},

};



static struct a6xx_protected_regs {
@@ -610,7 +612,7 @@ __get_gmu_ao_cgc_mode_cntl(struct adreno_device *adreno_dev) 
{

	if (adreno_is_a608(adreno_dev))

		return 0x00000022;

	else if (adreno_is_a615(adreno_dev))

	if (adreno_is_a615(adreno_dev) || adreno_is_a616(adreno_dev))

		return 0x00000222;

	else

		return 0x00020202;
@@ -621,7 +623,7 @@ __get_gmu_ao_cgc_delay_cntl(struct adreno_device *adreno_dev) 
{

	if (adreno_is_a608(adreno_dev))

		return 0x00000011;

	else if (adreno_is_a615(adreno_dev))

	if (adreno_is_a615(adreno_dev) || adreno_is_a616(adreno_dev))

		return 0x00000111;

	else

		return 0x00010111;
@@ -632,7 +634,7 @@ __get_gmu_ao_cgc_hyst_cntl(struct adreno_device *adreno_dev) 
{

	if (adreno_is_a608(adreno_dev))

		return 0x00000055;

	else if (adreno_is_a615(adreno_dev))

	if (adreno_is_a615(adreno_dev) || adreno_is_a616(adreno_dev))

		return 0x00000555;

	else

		return 0x00005555;
@@ -746,7 +748,8 @@ static void a6xx_patch_pwrup_reglist(struct adreno_device *adreno_dev) 
		+ sizeof(a6xx_ifpc_pwrup_reglist), a6xx_pwrup_reglist,

		sizeof(a6xx_pwrup_reglist));



	if (adreno_is_a615(adreno_dev) || adreno_is_a608(adreno_dev)) {

	if (adreno_is_a615(adreno_dev) || adreno_is_a608(adreno_dev) ||

		adreno_is_a616(adreno_dev)) {

		for (i = 0; i < ARRAY_SIZE(a615_pwrup_reglist); i++) {

			r = &a615_pwrup_reglist[i];

			kgsl_regread(KGSL_DEVICE(adreno_dev),
@@ -2695,6 +2698,7 @@ static const struct { 
} a6xx_efuse_funcs[] = {

	{ adreno_is_a615, a6xx_efuse_speed_bin },

	{ adreno_is_a608, a6xx_efuse_speed_bin },

	{ adreno_is_a616, a6xx_efuse_speed_bin },

};



static void a6xx_check_features(struct adreno_device *adreno_dev)

drivers/gpu/msm/adreno_a6xx_gmu.c

+4 −2
Original line number Diff line number Diff line
@@ -535,7 +535,8 @@ static int a6xx_gmu_oob_set(struct adreno_device *adreno_dev, 
	if (!gmu_core_isenabled(device))

		return 0;



	if (!adreno_is_a630(adreno_dev) && !adreno_is_a615(adreno_dev)) {

	if (!adreno_is_a630(adreno_dev) && !adreno_is_a615(adreno_dev) &&

		!adreno_is_a616(adreno_dev)) {

		set = BIT(30 - req * 2);

		check = BIT(31 - req);
@@ -588,7 +589,8 @@ static inline void a6xx_gmu_oob_clear(struct adreno_device *adreno_dev, 
	if (!gmu_core_isenabled(device))

		return;



	if (!adreno_is_a630(adreno_dev) && !adreno_is_a615(adreno_dev)) {

	if (!adreno_is_a630(adreno_dev) && !adreno_is_a615(adreno_dev) &&

		!adreno_is_a616(adreno_dev)) {

		clear = BIT(31 - req * 2);

		if (req >= 6) {

			dev_err(&gmu->pdev->dev,

drivers/gpu/msm/adreno_a6xx_snapshot.c

+2 −1
Original line number Diff line number Diff line
@@ -1131,7 +1131,8 @@ static size_t a6xx_snapshot_dbgc_debugbus_block(struct kgsl_device *device, 


	block_id = block->block_id;

	/* GMU_GX data is read using the GMU_CX block id on A630 */

	if ((adreno_is_a630(adreno_dev) || adreno_is_a615(adreno_dev)) &&

	if ((adreno_is_a630(adreno_dev) || adreno_is_a615(adreno_dev) ||

		adreno_is_a616(adreno_dev)) &&

		(block_id == A6XX_DBGBUS_GMU_GX))

		block_id = A6XX_DBGBUS_GMU_CX;