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Commit 38e64ba0 authored by Mac Lin's avatar Mac Lin Committed by Anton Vorontsov
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ARM: cns3xxx: Add new and export the old power management functions



This patch adds cns3xxx_pwr_clk_dis, and exports these power management
functions that may be used by many other device drivers on CNS3XXX.

Signed-off-by: default avatarMac Lin <mkl0301@gmail.com>
Signed-off-by: default avatarAnton Vorontsov <cbouatmailru@gmail.com>
parent df8f4d2f
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+0 −2
Original line number Diff line number Diff line
@@ -17,7 +17,5 @@ extern struct sys_timer cns3xxx_timer;
void __init cns3xxx_map_io(void);
void __init cns3xxx_init_irq(void);
void cns3xxx_power_off(void);
void cns3xxx_pwr_power_up(unsigned int block);
void cns3xxx_pwr_power_down(unsigned int block);

#endif /* __CNS3XXX_CORE_H */
+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@
#include <linux/platform_device.h>
#include <mach/cns3xxx.h>
#include <mach/irqs.h>
#include <mach/pm.h>
#include "core.h"
#include "devices.h"

+19 −0
Original line number Diff line number Diff line
/*
 * Copyright 2000 Deep Blue Solutions Ltd
 * Copyright 2004 ARM Limited
 * Copyright 2008 Cavium Networks
 *
 * This file is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, Version 2, as
 * published by the Free Software Foundation.
 */

#ifndef __CNS3XXX_PM_H
#define __CNS3XXX_PM_H

void cns3xxx_pwr_clk_en(unsigned int block);
void cns3xxx_pwr_clk_dis(unsigned int block);
void cns3xxx_pwr_power_up(unsigned int block);
void cns3xxx_pwr_power_down(unsigned int block);

#endif /* __CNS3XXX_PM_H */
+18 −0
Original line number Diff line number Diff line
@@ -6,10 +6,13 @@
 * published by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <mach/system.h>
#include <mach/cns3xxx.h>
#include <mach/pm.h>

void cns3xxx_pwr_clk_en(unsigned int block)
{
@@ -18,6 +21,16 @@ void cns3xxx_pwr_clk_en(unsigned int block)
	reg |= (block & PM_CLK_GATE_REG_MASK);
	__raw_writel(reg, PM_CLK_GATE_REG);
}
EXPORT_SYMBOL(cns3xxx_pwr_clk_en);

void cns3xxx_pwr_clk_dis(unsigned int block)
{
	u32 reg = __raw_readl(PM_CLK_GATE_REG);

	reg &= ~(block & PM_CLK_GATE_REG_MASK);
	__raw_writel(reg, PM_CLK_GATE_REG);
}
EXPORT_SYMBOL(cns3xxx_pwr_clk_dis);

void cns3xxx_pwr_power_up(unsigned int block)
{
@@ -29,6 +42,7 @@ void cns3xxx_pwr_power_up(unsigned int block)
	/* Wait for 300us for the PLL output clock locked. */
	udelay(300);
};
EXPORT_SYMBOL(cns3xxx_pwr_power_up);

void cns3xxx_pwr_power_down(unsigned int block)
{
@@ -38,6 +52,7 @@ void cns3xxx_pwr_power_down(unsigned int block)
	reg |= (block & CNS3XXX_PWR_PLL_ALL);
	__raw_writel(reg, PM_PLL_HM_PD_CTRL_REG);
};
EXPORT_SYMBOL(cns3xxx_pwr_power_down);

static void cns3xxx_pwr_soft_rst_force(unsigned int block)
{
@@ -57,6 +72,7 @@ static void cns3xxx_pwr_soft_rst_force(unsigned int block)

	__raw_writel(reg, PM_SOFT_RST_REG);
}
EXPORT_SYMBOL(cns3xxx_pwr_soft_rst_force);

void cns3xxx_pwr_soft_rst(unsigned int block)
{
@@ -70,6 +86,7 @@ void cns3xxx_pwr_soft_rst(unsigned int block)
	}
	cns3xxx_pwr_soft_rst_force(block);
}
EXPORT_SYMBOL(cns3xxx_pwr_soft_rst);

void arch_reset(char mode, const char *cmd)
{
@@ -100,3 +117,4 @@ int cns3xxx_cpu_clock(void)

	return cpu;
}
EXPORT_SYMBOL(cns3xxx_cpu_clock);