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Commit 38810497 authored by Wang Xiaoyin's avatar Wang Xiaoyin Committed by Wei Xu
Browse files

arm64: dts: hi3660: add spi device nodes



Add spi2 and spi3 device nodes for hi3660, and enable them for hikey960.

On HiKey960:
 - SPI2 is wired out through low speed expansion connector.
 - SPI3 is wired out through high speed expansion connector.

Signed-off-by: default avatarWang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: default avatarGuodong Xu <guodong.xu@linaro.org>
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent fc5f2ed6
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+12 −0
Original line number Diff line number Diff line
@@ -142,3 +142,15 @@
	label = "LS-UART1";
	status = "okay";
};

&spi2 {
	/* On Low speed expansion */
	label = "LS-SPI0";
	status = "okay";
};

&spi3 {
	/* On High speed expansion */
	label = "HS-SPI1";
	status = "okay";
};
+30 −0
Original line number Diff line number Diff line
@@ -713,5 +713,35 @@
			clocks = <&sctrl HI3660_PCLK_AO_GPIO6>;
			clock-names = "apb_pclk";
		};

		spi2: spi@ffd68000 {
			compatible = "arm,pl022", "arm,primecell";
			reg = <0x0 0xffd68000 0x0 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>;
			clock-names = "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <&spi2_pmx_func>;
			num-cs = <1>;
			cs-gpios = <&gpio27 2 0>;
			status = "disabled";
		};

		spi3: spi@ff3b3000 {
			compatible = "arm,pl022", "arm,primecell";
			reg = <0x0 0xff3b3000 0x0 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>;
			clock-names = "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <&spi3_pmx_func>;
			num-cs = <1>;
			cs-gpios = <&gpio18 5 0>;
			status = "disabled";
		};
	};
};