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Commit 37bca7f6 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "drm/msm/dp: add extra 100ms sleep when MSTM_CTRL is not cleared"

parents 5a7e7810 5466de2e

drivers/gpu/drm/msm/dp/dp_display.c

+12 −0
Original line number Original line Diff line number Diff line
@@ -620,6 +620,8 @@ static void dp_display_process_mst_hpd_high(struct dp_display_private *dp, 
{

{

	bool is_mst_receiver;

	bool is_mst_receiver;

	struct dp_mst_hpd_info info;

	struct dp_mst_hpd_info info;

	const int clear_mstm_ctrl_timeout = 100000;

	u8 old_mstm_ctrl;

	int ret;

	int ret;





	if (!dp->parser->has_mst || !dp->mst.drm_registered) {

	if (!dp->parser->has_mst || !dp->mst.drm_registered) {
@@ -639,8 +641,18 @@ static void dp_display_process_mst_hpd_high(struct dp_display_private *dp, 
		}

		}





		/* clear sink mst state */

		/* clear sink mst state */

		drm_dp_dpcd_readb(dp->aux->drm_aux, DP_MSTM_CTRL,

				&old_mstm_ctrl);

		drm_dp_dpcd_writeb(dp->aux->drm_aux, DP_MSTM_CTRL, 0);

		drm_dp_dpcd_writeb(dp->aux->drm_aux, DP_MSTM_CTRL, 0);





		/* add extra delay if MST state is not cleared */

		if (old_mstm_ctrl) {

			DP_MST_DEBUG("MSTM_CTRL is not cleared, wait %dus\n",

					clear_mstm_ctrl_timeout);

			usleep_range(clear_mstm_ctrl_timeout,

				clear_mstm_ctrl_timeout + 1000);

		}



		ret = drm_dp_dpcd_writeb(dp->aux->drm_aux, DP_MSTM_CTRL,

		ret = drm_dp_dpcd_writeb(dp->aux->drm_aux, DP_MSTM_CTRL,

				 DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC);

				 DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC);

		if (ret < 0) {

		if (ret < 0) {