Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 370ce45b authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon/cik: use a separate counter for CP init timeout 



Otherwise we may fail to init the second compute ring.

Noticed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent ff1b1294

drivers/gpu/drm/radeon/cik.c

+2 −2
Original line number Diff line number Diff line
@@ -4803,7 +4803,7 @@ struct bonaire_mqd 
 */

static int cik_cp_compute_resume(struct radeon_device *rdev)

{

	int r, i, idx;

	int r, i, j, idx;

	u32 tmp;

	bool use_doorbell = true;

	u64 hqd_gpu_addr;
@@ -4922,7 +4922,7 @@ static int cik_cp_compute_resume(struct radeon_device *rdev) 
		mqd->queue_state.cp_hqd_pq_wptr= 0;

		if (RREG32(CP_HQD_ACTIVE) & 1) {

			WREG32(CP_HQD_DEQUEUE_REQUEST, 1);

			for (i = 0; i < rdev->usec_timeout; i++) {

			for (j = 0; j < rdev->usec_timeout; j++) {

				if (!(RREG32(CP_HQD_ACTIVE) & 1))

					break;

				udelay(1);