Merge "drm/msm/sde: parse qdss entry from device tree for display driver" (3638c290) · Commits · e / devices / android_kernel_oneplus_sm8150

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+58 −0

Original line number	Diff line number	Diff line
		@@ -711,6 +711,11 @@ static struct sde_prop_type merge_3d_prop[] = {
		{HW_LEN, "qcom,sde-merge-3d-size", false, PROP_TYPE_U32},
		};

		static struct sde_prop_type qdss_prop[] = {
		{HW_OFF, "qcom,sde-qdss-off", false, PROP_TYPE_U32_ARRAY},
		{HW_LEN, "qcom,sde-qdss-size", false, PROP_TYPE_U32},
		};

		static struct sde_prop_type inline_rot_prop[INLINE_ROT_PROP_MAX] = {
		{INLINE_ROT_XIN, "qcom,sde-inline-rot-xin", false,
		PROP_TYPE_U32_ARRAY},
		@@ -3472,6 +3477,55 @@ static int sde_parse_merge_3d_dt(struct device_node *np,
		return rc;
		}

		int sde_qdss_parse_dt(struct device_node np, struct sde_mdss_cfg sde_cfg)
		{
		int rc, prop_count[HW_PROP_MAX], i;
		struct sde_prop_value *prop_value = NULL;
		bool prop_exists[HW_PROP_MAX];
		u32 off_count;
		struct sde_qdss_cfg *qdss;

		if (!sde_cfg) {
		SDE_ERROR("invalid argument\n");
		rc = -EINVAL;
		goto end;
		}

		prop_value = kzalloc(HW_PROP_MAX *
		sizeof(struct sde_prop_value), GFP_KERNEL);
		if (!prop_value) {
		rc = -ENOMEM;
		goto end;
		}

		rc = _validate_dt_entry(np, qdss_prop, ARRAY_SIZE(qdss_prop),
		prop_count, &off_count);
		if (rc) {
		sde_cfg->qdss_count = 0;
		goto end;
		}

		sde_cfg->qdss_count = off_count;

		rc = _read_dt_entry(np, qdss_prop, ARRAY_SIZE(qdss_prop), prop_count,
		prop_exists, prop_value);
		if (rc)
		goto end;

		for (i = 0; i < off_count; i++) {
		qdss = sde_cfg->qdss + i;
		qdss->base = PROP_VALUE_ACCESS(prop_value, HW_OFF, i);
		qdss->id = QDSS_0 + i;
		snprintf(qdss->name, SDE_HW_BLK_NAME_LEN, "qdss_%u",
		qdss->id - QDSS_0);
		qdss->len = PROP_VALUE_ACCESS(prop_value, HW_LEN, 0);
		}

		end:
		kfree(prop_value);
		return rc;
		}

		static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg,
		uint32_t hw_rev)
		{
		@@ -3882,6 +3936,10 @@ struct sde_mdss_cfg sde_hw_catalog_init(struct drm_device dev, u32 hw_rev)
		if (rc)
		goto end;

		rc = sde_qdss_parse_dt(np, sde_cfg);
		if (rc)
		goto end;

		rc = _sde_hardware_post_caps(sde_cfg, hw_rev);
		if (rc)
		goto end;

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+14 −0

Original line number	Diff line number	Diff line
		@@ -836,6 +836,17 @@ struct sde_merge_3d_cfg {
		SDE_HW_BLK_INFO;
		};

		/**
		* struct sde_qdss_cfg - information of qdss blocks
		* @id enum identifying this block
		* @base register offset of this block
		* @len: length of hardware block
		* @features bit mask identifying sub-blocks/features
		*/
		struct sde_qdss_cfg {
		SDE_HW_BLK_INFO;
		};

		/**
		* struct sde_rot_vbif_cfg - inline rotator vbif configs
		* @xin_id xin client id
		@@ -1178,6 +1189,9 @@ struct sde_mdss_cfg {
		u32 merge_3d_count;
		struct sde_merge_3d_cfg merge_3d[MAX_BLOCKS];

		u32 qdss_count;
		struct sde_qdss_cfg qdss[MAX_BLOCKS];

		/* Add additional block data structures here */

		struct sde_perf_cfg perf;

drivers/gpu/drm/msm/sde/sde_hw_mdss.h

+8 −1

Original line number	Diff line number	Diff line
		/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -112,6 +112,7 @@ enum sde_hw_blk_type {
		SDE_HW_BLK_DSC,
		SDE_HW_BLK_ROT,
		SDE_HW_BLK_MERGE_3D,
		SDE_HW_BLK_QDSS,
		SDE_HW_BLK_MAX,
		};

		@@ -326,6 +327,11 @@ enum sde_merge_3d {
		MERGE_3D_MAX
		};

		enum sde_qdss {
		QDSS_0,
		QDSS_MAX
		};

		/**
		* SDE HW,Component order color map
		*/
		@@ -514,6 +520,7 @@ struct sde_mdss_color {
		#define SDE_DBG_MASK_ROT (1 << 12)
		#define SDE_DBG_MASK_DS (1 << 13)
		#define SDE_DBG_MASK_REGDMA (1 << 14)
		#define SDE_DBG_MASK_QDSS (1 << 15)

		/**
		* struct sde_hw_cp_cfg: hardware dspp/lm feature payload.