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Commit 361c564e authored by Arnaldo Carvalho de Melo's avatar Arnaldo Carvalho de Melo
Browse files

perf tools: Move x86 barrier.h stuff to tools/arch/x86/include/asm/barrier.h 

We will need it for atomic.h, so move it from the ad-hoc tools/perf/
place to a tools/ subset of the kernel arch/ hierarchy.

Other aches will follow, each in a cset.

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: David Ahern <dsahern@gmail.com>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/n/tip-vy6bqmsvm6puibpay2cy4wid@git.kernel.org


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent f8bffbf1

tools/arch/x86/include/asm/barrier.h

0 → 100644
+28 −0
Original line number Diff line number Diff line 
#ifndef _TOOLS_LINUX_ASM_X86_BARRIER_H

#define _TOOLS_LINUX_ASM_X86_BARRIER_H



/*

 * Copied from the Linux kernel sources, and also moving code

 * out from tools/perf/perf-sys.h so as to make it be located

 * in a place similar as in the kernel sources.

 *

 * Force strict CPU ordering.

 * And yes, this is required on UP too when we're talking

 * to devices.

 */



#if defined(__i386__)

/*

 * Some non-Intel clones support out of order store. wmb() ceases to be a

 * nop for these.

 */

#define mb()	asm volatile("lock; addl $0,0(%%esp)" ::: "memory")

#define rmb()	asm volatile("lock; addl $0,0(%%esp)" ::: "memory")

#define wmb()	asm volatile("lock; addl $0,0(%%esp)" ::: "memory")

#elif defined(__x86_64__)

#define mb() 	asm volatile("mfence":::"memory")

#define rmb()	asm volatile("lfence":::"memory")

#define wmb()	asm volatile("sfence" ::: "memory")

#endif



#endif /* _TOOLS_LINUX_ASM_X86_BARRIER_H */

tools/include/asm/barrier.h

0 → 100644
+3 −0
Original line number Diff line number Diff line 
#if defined(__i386__) || defined(__x86_64__)

#include "../../arch/x86/include/asm/barrier.h"

#endif

tools/perf/MANIFEST

+2 −0
Original line number Diff line number Diff line 
tools/perf

tools/arch/x86/include/asm/barrier.h

tools/scripts

tools/build

tools/lib/traceevent
@@ -6,6 +7,7 @@ tools/lib/api 
tools/lib/symbol/kallsyms.c

tools/lib/symbol/kallsyms.h

tools/lib/util/find_next_bit.c

tools/include/asm/barrier.h

tools/include/asm/bug.h

tools/include/asm-generic/bitops/arch_hweight.h

tools/include/asm-generic/bitops/atomic.h

tools/perf/perf-sys.h

+1 −6
Original line number Diff line number Diff line
@@ -6,11 +6,9 @@ 
#include <sys/syscall.h>

#include <linux/types.h>

#include <linux/perf_event.h>

#include <asm/barrier.h>



#if defined(__i386__)

#define mb()		asm volatile("lock; addl $0,0(%%esp)" ::: "memory")

#define wmb()		asm volatile("lock; addl $0,0(%%esp)" ::: "memory")

#define rmb()		asm volatile("lock; addl $0,0(%%esp)" ::: "memory")

#define cpu_relax()	asm volatile("rep; nop" ::: "memory");

#define CPUINFO_PROC	{"model name"}

#ifndef __NR_perf_event_open
@@ -25,9 +23,6 @@ 
#endif



#if defined(__x86_64__)

#define mb()		asm volatile("mfence" ::: "memory")

#define wmb()		asm volatile("sfence" ::: "memory")

#define rmb()		asm volatile("lfence" ::: "memory")

#define cpu_relax()	asm volatile("rep; nop" ::: "memory");

#define CPUINFO_PROC	{"model name"}

#ifndef __NR_perf_event_open