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Commit 35b55ef2 authored by Noam Camus's avatar Noam Camus Committed by Vineet Gupta
Browse files

ARC: [plat-eznps] new command line argument for HW scheduler at MTM 



We add ability for all cores at NPS SoC to control the number of cycles
HW thread can execute before it is replace with another eligible
HW thread within the same core. The replacement is done by the
HW scheduler.

Signed-off-by: default avatarNoam Camus <noamca@mellanox.com>
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
[vgupta: simplified handlign of out of range argument value]
parent 18ee4bec

Documentation/admin-guide/kernel-parameters.txt

+9 −0
Original line number Diff line number Diff line
@@ -2750,6 +2750,15 @@ 
			If the dependencies are under your control, you can

			turn on cpu0_hotplug.



	nps_mtm_hs_ctr= [KNL,ARC]

			This parameter sets the maximum duration, in

			cycles, each HW thread of the CTOP can run

			without interruptions, before HW switches it.

			The actual maximum duration is 16 times this

			parameter's value.

			Format: integer between 1 and 255

			Default: 255



	nptcg=		[IA-64] Override max number of concurrent global TLB

			purges which is reported from either PAL_VM_SUMMARY or

			SAL PALO.

arch/arc/plat-eznps/mtm.c

+25 −2
Original line number Diff line number Diff line
@@ -21,10 +21,13 @@ 
#include <plat/mtm.h>

#include <plat/smp.h>



#define MT_CTRL_HS_CNT		0xFF

#define MT_HS_CNT_MIN		0x01

#define MT_HS_CNT_MAX		0xFF

#define MT_CTRL_ST_CNT		0xF

#define NPS_NUM_HW_THREADS	0x10



static int mtm_hs_ctr = MT_HS_CNT_MAX;



#ifdef CONFIG_EZNPS_MEM_ERROR_ALIGN

int do_memory_error(unsigned long address, struct pt_regs *regs)

{
@@ -127,7 +130,7 @@ void mtm_enable_core(unsigned int cpu) 
	/* Enable HW schedule, stall counter, mtm */

	mt_ctrl.value = 0;

	mt_ctrl.hsen = 1;

	mt_ctrl.hs_cnt = MT_CTRL_HS_CNT;

	mt_ctrl.hs_cnt = mtm_hs_ctr;

	mt_ctrl.mten = 1;

	write_aux_reg(CTOP_AUX_MT_CTRL, mt_ctrl.value);
@@ -138,3 +141,23 @@ void mtm_enable_core(unsigned int cpu) 
	 */

	cpu_relax();

}



/* Verify and set the value of the mtm hs counter */

static int __init set_mtm_hs_ctr(char *ctr_str)

{

	long hs_ctr;

	int ret;



	ret = kstrtol(ctr_str, 0, &hs_ctr);



	if (ret || hs_ctr > MT_HS_CNT_MAX || hs_ctr < MT_HS_CNT_MIN) {

		pr_err("** Invalid @nps_mtm_hs_ctr [%d] needs to be [%d:%d] (incl)\n",

		       hs_ctr, MT_HS_CNT_MIN, MT_HS_CNT_MAX);

		return -EINVAL;

	}



	mtm_hs_ctr = hs_ctr;



	return 0;

}

early_param("nps_mtm_hs_ctr", set_mtm_hs_ctr);