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Commit 3582ad13 authored by sagar.a.kamble@intel.com's avatar sagar.a.kamble@intel.com Committed by Tvrtko Ursulin
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drm/i915: Do RPM Wake during GuC/HuC status read 



HUC_STATUS, GUC_STATUS, SOFT_SCRATCH registers are read in debugfs
and getparam ioctl. This patch covers those accesses by RPM get/put.

v2: Covering access in i915_getparam(I915_PARAM_HUC_STATUS) (ChrisW)

Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Fiedorowicz, Lukasz <lukasz.fiedorowicz@intel.com>
Signed-off-by: default avatarSagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: default avatarArkadiusz Hiler <arkadiusz.hiler@intel.com>
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1486110513-12130-1-git-send-email-sagar.a.kamble@intel.com
parent 262fd485

drivers/gpu/drm/i915/i915_debugfs.c

+6 −0
Original line number Original line Diff line number Diff line
@@ -2412,7 +2412,9 @@ static int i915_huc_load_status_info(struct seq_file *m, void *data) 
	seq_printf(m, "\tRSA: offset is %d; size = %d\n",

	seq_printf(m, "\tRSA: offset is %d; size = %d\n",

		huc_fw->rsa_offset, huc_fw->rsa_size);

		huc_fw->rsa_offset, huc_fw->rsa_size);





	intel_runtime_pm_get(dev_priv);

	seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));

	seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));

	intel_runtime_pm_put(dev_priv);





	return 0;

	return 0;

}

}
@@ -2444,6 +2446,8 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data) 
	seq_printf(m, "\tRSA: offset is %d; size = %d\n",

	seq_printf(m, "\tRSA: offset is %d; size = %d\n",

		guc_fw->rsa_offset, guc_fw->rsa_size);

		guc_fw->rsa_offset, guc_fw->rsa_size);





	intel_runtime_pm_get(dev_priv);



	tmp = I915_READ(GUC_STATUS);

	tmp = I915_READ(GUC_STATUS);





	seq_printf(m, "\nGuC status 0x%08x:\n", tmp);

	seq_printf(m, "\nGuC status 0x%08x:\n", tmp);
@@ -2457,6 +2461,8 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data) 
	for (i = 0; i < 16; i++)

	for (i = 0; i < 16; i++)

		seq_printf(m, "\t%2d: \t0x%x\n", i, I915_READ(SOFT_SCRATCH(i)));

		seq_printf(m, "\t%2d: \t0x%x\n", i, I915_READ(SOFT_SCRATCH(i)));





	intel_runtime_pm_put(dev_priv);



	return 0;

	return 0;

}

}

drivers/gpu/drm/i915/i915_drv.c

+2 −3
Original line number Original line Diff line number Diff line
@@ -319,10 +319,9 @@ static int i915_getparam(struct drm_device *dev, void *data, 
		value = INTEL_INFO(dev_priv)->sseu.min_eu_in_pool;

		value = INTEL_INFO(dev_priv)->sseu.min_eu_in_pool;

		break;

		break;

	case I915_PARAM_HUC_STATUS:

	case I915_PARAM_HUC_STATUS:

		/* The register is already force-woken. We dont need

		intel_runtime_pm_get(dev_priv);

		 * any rpm here

		 */

		value = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;

		value = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;

		intel_runtime_pm_put(dev_priv);

		break;

		break;

	case I915_PARAM_MMAP_GTT_VERSION:

	case I915_PARAM_MMAP_GTT_VERSION:

		/* Though we've started our numbering from 1, and so class all

		/* Though we've started our numbering from 1, and so class all