Merge branch 'topic/api_caps' into for-linus (355cdafe) · Commits · e / devices / android_kernel_oneplus_sm8150

drivers/dma/pl330.c

+27 −0

Original line number	Diff line number	Diff line
		@@ -2870,6 +2870,32 @@ static irqreturn_t pl330_irq_handler(int irq, void *data)
		return IRQ_NONE;
		}

		#define PL330_DMA_BUSWIDTHS \
		BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) \| \
		BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) \| \
		BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) \| \
		BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) \| \
		BIT(DMA_SLAVE_BUSWIDTH_8_BYTES)

		static int pl330_dma_device_slave_caps(struct dma_chan *dchan,
		struct dma_slave_caps *caps)
		{
		caps->src_addr_widths = PL330_DMA_BUSWIDTHS;
		caps->dstn_addr_widths = PL330_DMA_BUSWIDTHS;
		caps->directions = BIT(DMA_DEV_TO_MEM) \| BIT(DMA_MEM_TO_DEV);
		caps->cmd_pause = false;
		caps->cmd_terminate = true;

		/*
		* This is the limit for transfers with a buswidth of 1, larger
		* buswidths will have larger limits.
		*/
		caps->max_sg_len = 1900800;
		caps->max_sg_nr = 0;

		return 0;
		}

		static int
		pl330_probe(struct amba_device adev, const struct amba_id id)
		{
		@@ -2975,6 +3001,7 @@ pl330_probe(struct amba_device adev, const struct amba_id id)
		pd->device_prep_slave_sg = pl330_prep_slave_sg;
		pd->device_control = pl330_control;
		pd->device_issue_pending = pl330_issue_pending;
		pd->device_slave_caps = pl330_dma_device_slave_caps;

		ret = dma_async_device_register(pd);
		if (ret) {

include/linux/dmaengine.h

+44 −0

Original line number	Diff line number	Diff line
		@@ -370,6 +370,33 @@ struct dma_slave_config {
		unsigned int slave_id;
		};

		/* struct dma_slave_caps - expose capabilities of a slave channel only
		*
		* @src_addr_widths: bit mask of src addr widths the channel supports
		* @dstn_addr_widths: bit mask of dstn addr widths the channel supports
		* @directions: bit mask of slave direction the channel supported
		* since the enum dma_transfer_direction is not defined as bits for each
		* type of direction, the dma controller should fill (1 << <TYPE>) and same
		* should be checked by controller as well
		* @cmd_pause: true, if pause and thereby resume is supported
		* @cmd_terminate: true, if terminate cmd is supported
		*
		* @max_sg_nr: maximum number of SG segments supported
		* 0 for no maximum
		* @max_sg_len: maximum length of a SG segment supported
		* 0 for no maximum
		*/
		struct dma_slave_caps {
		u32 src_addr_widths;
		u32 dstn_addr_widths;
		u32 directions;
		bool cmd_pause;
		bool cmd_terminate;

		u32 max_sg_nr;
		u32 max_sg_len;
		};

		static inline const char dma_chan_name(struct dma_chan chan)
		{
		return dev_name(&chan->dev->device);
		@@ -532,6 +559,7 @@ struct dma_tx_state {
		* struct with auxiliary transfer status information, otherwise the call
		* will just return a simple status code
		* @device_issue_pending: push pending transactions to hardware
		* @device_slave_caps: return the slave channel capabilities
		*/
		struct dma_device {

		@@ -597,6 +625,7 @@ struct dma_device {
		dma_cookie_t cookie,
		struct dma_tx_state *txstate);
		void (device_issue_pending)(struct dma_chan chan);
		int (device_slave_caps)(struct dma_chan chan, struct dma_slave_caps *caps);
		};

		static inline int dmaengine_device_control(struct dma_chan *chan,
		@@ -670,6 +699,21 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
		return chan->device->device_prep_interleaved_dma(chan, xt, flags);
		}

		static inline int dma_get_slave_caps(struct dma_chan chan, struct dma_slave_caps caps)
		{
		if (!chan \|\| !caps)
		return -EINVAL;

		/* check if the channel supports slave transactions */
		if (!test_bit(DMA_SLAVE, chan->device->cap_mask.bits))
		return -ENXIO;

		if (chan->device->device_slave_caps)
		return chan->device->device_slave_caps(chan, caps);

		return -ENXIO;
		}

		static inline int dmaengine_terminate_all(struct dma_chan *chan)
		{
		return dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0);